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Nucleus: Finding the Sharing Limit of Heterogeneous Cores

Nucleus: Finding the Sharing Limit of Heterogeneous Cores Nucleus: Finding the Sharing Limit of Heterogeneous Cores ILIAS VOUGIOUKAS, ARM Research and University of Southampton ANDREAS SANDBERG and STEPHAN DIESTELHORST, ARM Research BASHIR M. AL-HASHIMI and GEOFF V. MERRETT, University of Southampton Heterogeneous multi-processors are designed to bridge the gap between performance and energy efficiency in modern embedded systems. This is achieved by pairing Out-of-Order (OoO) cores, yielding performance through aggressive speculation and latency masking, with In-Order (InO) cores, that preserve energy through simpler design. By leveraging migrations between them, workloads can therefore select the best setting for any given energy/delay envelope. However, migrations introduce execution overheads that can hurt performance if they happen too frequently. Finding the optimal migration frequency is critical to maximize energy savings while maintaining acceptable performance. We develop a simulation methodology that can 1) isolate the hardware effects of migrations from the software, 2) directly compare the performance of different core types, 3) quantify the performance degradation and 4) calculate the cost of migrations for each case. To showcase our methodology we run mibench, a microbenchmark suite, and show that migrations can happen as fast as every 100k instructions with little performance loss. We also show that, contrary to numerous recent studies, http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Embedded Computing Systems (TECS) Association for Computing Machinery

Nucleus: Finding the Sharing Limit of Heterogeneous Cores

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Publisher
Association for Computing Machinery
Copyright
Copyright © 2017 by ACM Inc.
ISSN
1539-9087
DOI
10.1145/3126544
Publisher site
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Abstract

Nucleus: Finding the Sharing Limit of Heterogeneous Cores ILIAS VOUGIOUKAS, ARM Research and University of Southampton ANDREAS SANDBERG and STEPHAN DIESTELHORST, ARM Research BASHIR M. AL-HASHIMI and GEOFF V. MERRETT, University of Southampton Heterogeneous multi-processors are designed to bridge the gap between performance and energy efficiency in modern embedded systems. This is achieved by pairing Out-of-Order (OoO) cores, yielding performance through aggressive speculation and latency masking, with In-Order (InO) cores, that preserve energy through simpler design. By leveraging migrations between them, workloads can therefore select the best setting for any given energy/delay envelope. However, migrations introduce execution overheads that can hurt performance if they happen too frequently. Finding the optimal migration frequency is critical to maximize energy savings while maintaining acceptable performance. We develop a simulation methodology that can 1) isolate the hardware effects of migrations from the software, 2) directly compare the performance of different core types, 3) quantify the performance degradation and 4) calculate the cost of migrations for each case. To showcase our methodology we run mibench, a microbenchmark suite, and show that migrations can happen as fast as every 100k instructions with little performance loss. We also show that, contrary to numerous recent studies,

Journal

ACM Transactions on Embedded Computing Systems (TECS) – Association for Computing Machinery

Published: Oct 10, 2017

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