Design and implementation of sub 0.5‐V OTAs in 0.18‐μm
| Fabian Khateb
Department of Electrical Engineering,
Częstochowa University of Technology,
Częstochowa 42‐201, Poland
Department of Microelectronics, Brno
University of Technology, Technická 10,
Brno, Czech Republic
Faculty of Biomedical Engineering,
Czech Technical University in Prague,
nám. Sítná 3105, Kladno, Czech Republic
T. Kulej, Department of Electrical
Engineering, Częstochowa University of
Technology, Częstochowa 42‐201, Poland.
National Sustainability Program, Grant/
Award Number: LO1401; Czech Science
Foundation, Grant/Award Number: P102‐
A family of bulk‐driven CMOS operational transconductance amplifiers (OTAs)
has been designed for extremely low supply voltages (0.3‐0.5 V). Three
OTA design schemes with different gain boosting techniques and class AB
input/output stages are discussed. A detailed comparison among these schemes
has been presented in terms of performance characteristics such as voltage gain,
gain‐bandwidth product, slew rate, circuit sensitivity to process/mismatch
variations, and silicon area. The design procedures for all the compared
structures have been developed. The OTAs have been fabricated in a standard
0.18‐μmn‐well CMOS process from TSMC. Chip test results are in good
agreement with theoretical predictions and simulations.
bulk driven, low power, low voltage, operational transconductance amplifiers, truly differential
1 | INTRODUCTION
In recent years, a new trend towards extremely low‐voltage (LV) and ultra‐low‐power (LP) circuits is emerging. It is
mainly motivated by the increasing interest in implantable medical electronics and autonomous sensor nodes supplied
with non‐conventional energy sources (energy harvesters). Since many energy harvesters can only provide power at a
very low voltage level and the available voltage boosting techniques are not always efficient at such extreme supply
conditions, therefore, intrinsic ultra‐LV techniques are highly desirable for such designs.
One of the most promising approaches to design analog and mixed signal LV LP circuits is based on the application of
subthreshold‐biased bulk‐driven (BD) transistors.
Despite many disadvantages of the BD devices (lower
transconductance, intrinsic voltage gain and cutoff frequency, larger input referred noise, etc
), this technique seems
to be still attractive in such cases when the supply voltage (V
) is comparable or even less than the threshold voltages
) of the used MOS transistors and a large input common‐mode range (ICMR) is required at the same time.
The operational transconductance amplifier (OTA) is the most frequently used analog building block in VLSI
systems. In recent years, a large number of LV BD OTAs have been reported in the literature.
designs, we can conclude that the supply voltage for many truly differential OTAs with a gain‐bandwidth product
(GBW) ranging from 1 to 10 MHz is nearly constant and equal to around |V
| + 0.3 V. Lower V
(close to |V
be achieved for circuits biased with very low currents (at the cost of a lower GBW),
or for circuits with pseudo‐differ-
ential input stages.
Therefore, many papers are focused on overcoming the disadvantages of the BD technique rather
than further decreasing the supply voltage. More specifically, new techniques for voltage gain boosting,
Received: 11 August 2017 Revised: 9 November 2017 Accepted: 29 January 2018
Int J Circ Theor Appl. 2018;46:1129–1143. Copyright © 2018 John Wiley & Sons, Ltd.wileyonlinelibrary.com/journal/cta 1129