1063-7397/02/3104- $27.00 © 2002 MAIK “Nauka /Interperiodica”
Russian Microelectronics, Vol. 31, No. 4, 2002, pp. 224–231. Translated from Mikroelektronika, Vol. 31, No. 4, 2002, pp. 263–273.
Original Russian Text Copyright © 2002 by Vassiliev.
Semiconductor microelectronics has long employed
CVD thin ﬁlms of silicon-based inorganic materials
with prescribed physical and chemical properties: poly-
crystalline or amorphous silicon, silicon nitride, silicon
dioxide, and silicate glasses. This technology accounts
for the largest, ever growing proportion of IC manufac-
We have reviewed general issues concerning the
CVD of silicon-containing ﬁlms: purposes, starting
substances, the conﬁguration of equipment, process
conditions, and possible ways to improve deposition
facilities . We have also addressed the quality of step
coverage and gap ﬁlling in CVD . Step coverage is
commonly quantiﬁed in terms of the ratio of ﬁlm thick-
nesses measured in relation to the sidewall and the top
of a step, respectively,
(Fig. 1a). It is stated as a
percentage. The gap between two adjacent features on
a wafer is usually characterized by the aspect ratio
are the depth and width of the gap,
respectively, with the two quantities measured in
micrometers (Fig. 1a).
Deposition onto stepped surfaces faces the chal-
lenge of uniform gap ﬁlling. First, cross-sectional SEM
micrographs of ﬁlled gaps indicate that the ﬁller may
contain voids, whose shape depends on the CVD tech-
nique employed and process conditions. Typical void
shapes are described in , the most commonly
encountered one being the keyhole shape (Fig. 1b).
Second, ﬁlled gaps may contain weakpoints, i.e., sites
where voids may develop during subsequent process-
ing. Such voids may differ in shape from those listed in
. Weakpoints cannot be detected by SEM analysis.
Voids are unacceptable because they seriously impair
The trend toward higher chip complexity has
resulted in gap widths less than 0.2
m, with gap depths
changed insigniﬁcantly. Accordingly,
may be as
large as 10 in modern ULSIs. A consequence of ongo-
ing microminiaturization is that the sizes of voids may
approach the size of the gap itself. In addition, although
designers usually take vertical gap proﬁles, actual pro-
ﬁles may appreciably deviate from this shape. We have
identiﬁed four major types of gap proﬁle: reentrant,
tapered, vertical, and tapered–vertical. They are
described in Table 1.
This paper presents a review of our experimental
investigations into ULSI gap ﬁlling [2–11]. The most
commonly used ﬁllers are considered: silicon dioxide,
phosphosilicate glass (PSG), borosilicate glass (BSG),
and borophosphosilicate glass (BPSG). Two strategies
are covered: (1) ﬁlling is effected by deposition only
and (2) ﬁlling is effected by deposition and planariza-
tion. For the gaps dealt with (Table 1),
0.02 to 0.5
varies from 0.5 to about 10.
2. CONCEPTUAL FRAMEWORK
The quality of CVD ﬁlms on stepped surfaces is
commonly assessed from cross-sectional SEM micro-
graphs. As-prepared cleavage surfaces are usually sub-
jected to short-term hydroﬂuoric acid etching: this
makes for sharper imaging and facilitates measuring
void sizes. However, the procedure may enlarge voids,
if performed improperly. Moreover, some authors
ascribe voiding to the etching, but this view was dis-
proved by our comparative experiments that detected
voids in unetched specimens as well .
At the start of our research, few publications were
available on the matter at hand and it was not clear how
to evaluate the gap-ﬁll capability of a CVD technique.
ULSI Gap Filling
with a Thin CVD SiO
-Based Insulator: A Review
V. Y. Vassiliev
Institute of Semiconductor Physics, Siberian Division, Russian Academy of Sciences, Novosibirsk, Russia
Received February 14, 2002
—Challenges and experimental results concerning the ﬁlling of feature-to-feature gaps on the stepped
surface of a ULSI chip are reviewed. The ﬁller is an SiO
-based insulator in the form of a CVD thin ﬁlm.
A conceptual framework for evaluating the gap-ﬁll capabilities of CVD processes is deﬁned. It essentially char-
acterizes a process in terms of step coverage and the parameter
is the gap depth and
minimum width of a gap that can be ﬁlled void-free by the process. This strategy is extended to the case where
deposition is followed by planarization, as with glasses. The approach proposed enables one to predict the per-
formance of practical processes and to signiﬁcantly reduce the amount of experimental work required.