The behavioral model of a split capacitor array involved in the successive approximation register ADC and taking into account the effect of parasitic capacitors

The behavioral model of a split capacitor array involved in the successive approximation register... The analysis of the effect of the parasitic capacitors on the split capacitor array digital-to analog converter for use in the successive approximation register analog-to-digital converter is presented. The Verilog-A model of the split capacitor array is developed based on the analysis. The advantages of using this model in the context of the top-down design methodology are considered. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Russian Microelectronics Springer Journals

The behavioral model of a split capacitor array involved in the successive approximation register ADC and taking into account the effect of parasitic capacitors

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Publisher
Springer US
Copyright
Copyright © 2013 by Pleiades Publishing, Ltd.
Subject
Engineering; Electrical Engineering
ISSN
1063-7397
eISSN
1608-3415
D.O.I.
10.1134/S1063739713040045
Publisher site
See Article on Publisher Site

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