Temporal characterization is considered of ready circuit topological variants of RAM compilers. Their number may reach 0.5–106. The problem is an inappropriate combination of accuracy-speed indicators of all known algorithms and software for calculating signal delays, if the specified calculation is performed for each case directly in the compiler. A number of conceptually related principles are proposed to consider the precision-performance ratio within acceptable limits.
Russian Microelectronics – Springer Journals
Published: Dec 4, 2011
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