Statistical Yield Modeling for IC Manufacture: Hierarchical Fault Distributions

Statistical Yield Modeling for IC Manufacture: Hierarchical Fault Distributions A hierarchical approach to the construction of compound distributions for process-induced faults in IC manufacture is proposed. Within this framework, the negative binomial distribution and the compound binomial distribution are treated as level-1 models. The hierarchical approach to fault distribution offers an integrated picture of how fault density varies from region to region within a wafer, from wafer to wafer within a batch, and so on. A theory of compound-distribution hierarchies is developed by means of generating functions. With respect to applications, hierarchies of yield means and yield probability-density functions are considered and an in-process measure of yield loss is introduced. It is shown that the hierarchical approach naturally embraces the Bayesian approach. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Russian Microelectronics Springer Journals

Statistical Yield Modeling for IC Manufacture: Hierarchical Fault Distributions

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Publisher
Kluwer Academic Publishers-Plenum Publishers
Copyright
Copyright © 2003 by MAIK Nauka/Interperiodica
Subject
Engineering; Electrical Engineering
ISSN
1063-7397
eISSN
1608-3415
D.O.I.
10.1023/A:1021813903727
Publisher site
See Article on Publisher Site

Abstract

A hierarchical approach to the construction of compound distributions for process-induced faults in IC manufacture is proposed. Within this framework, the negative binomial distribution and the compound binomial distribution are treated as level-1 models. The hierarchical approach to fault distribution offers an integrated picture of how fault density varies from region to region within a wafer, from wafer to wafer within a batch, and so on. A theory of compound-distribution hierarchies is developed by means of generating functions. With respect to applications, hierarchies of yield means and yield probability-density functions are considered and an in-process measure of yield loss is introduced. It is shown that the hierarchical approach naturally embraces the Bayesian approach.

Journal

Russian MicroelectronicsSpringer Journals

Published: Oct 11, 2004

References

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