Specific features of constructional optimization of the parameters of CMOS memory devices

Specific features of constructional optimization of the parameters of CMOS memory devices The constructional features of the design of individual units and their mutual arrangement in static CMOS memory devices are reviewed. These features have a consolidated effect upon the functionality, operating speed, and reliability of memory devices over a wide region of specified technological parameters of the manufacturing process. The principles of the architecture of static CMOS memory devices and the related problems of designing the circuits for the formation of a sequence of control signals by individual units are discussed. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Russian Microelectronics Springer Journals

Specific features of constructional optimization of the parameters of CMOS memory devices

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Publisher
SP MAIK Nauka/Interperiodica
Copyright
Copyright © 2010 by Pleiades Publishing, Ltd.
Subject
Engineering; Electrical Engineering
ISSN
1063-7397
eISSN
1608-3415
D.O.I.
10.1134/S1063739710040062
Publisher site
See Article on Publisher Site

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