Robust online monitoring of signal temporal logic

Robust online monitoring of signal temporal logic Signal temporal logic (STL) is a formalism used to rigorously specify requirements of cyberphysical systems (CPS), i.e., systems mixing digital or discrete components in interaction with a continuous environment or analog components. STL is naturally equipped with a quantitative semantics which can be used for various purposes: from assessing the robustness of a specification to guiding searches over the input and parameter space with the goal of falsifying the given property over system behaviors. Algorithms have been proposed and implemented for offline computation of such quantitative semantics, but only few methods exist for an online setting, where one would want to monitor the satisfaction of a formula during simulation. In this paper, we formalize a semantics for robust online monitoring of partial traces, i.e., traces for which there might not be enough data to decide the Boolean satisfaction (and to compute its quantitative counterpart). We propose an efficient algorithm to compute it and demonstrate its usage on two large scale real-world case studies coming from the automotive domain and from CPS education in a Massively Open Online Course setting. We show that savings in computationally expensive simulations far outweigh any overheads incurred by an online approach. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Formal Methods in System Design Springer Journals

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Publisher
Springer US
Copyright
Copyright © 2017 by Springer Science+Business Media, LLC
Subject
Engineering; Circuits and Systems; Electrical Engineering; Computer-Aided Engineering (CAD, CAE) and Design; Software Engineering/Programming and Operating Systems
ISSN
0925-9856
eISSN
1572-8102
D.O.I.
10.1007/s10703-017-0286-7
Publisher site
See Article on Publisher Site

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