ISSN 1063-7397, Russian Microelectronics, 2006, Vol. 35, No. 4, pp. 262–275. © Pleiades Publishing, Inc., 2006.
Original Russian Text © P.N. Bibilo, 2006, published in Mikroelektronika, 2006, Vol. 35, No. 4, pp. 306–320.
PRALU is a behavioral-description language appli-
cable to parallel algorithms for control units. It allows
one to write consistent, easy-to-understand, and com-
pact source texts, with Boolean variables used to repre-
sent input and output signals. The language is set out in
full detail in a monograph by Zakrevskii .
Techniques involving parallel- and sequential-
machine representations have been developed for high-
level synthesis of logic circuits from their PRALU
descriptions, including programmable logic arrays
(PLAs) with memory elements based on RS ﬂip-ﬂops.
PRALU was accepted in the USSR and Belarus as a
source language of computer-aided-design (CAD) soft-
ware for digital circuits [2, 3].
Very High Speed Integrated Circuits Hardware
Description Language (VHDL) has become an interna-
tional standard for the speciﬁcation, simulation, and
synthesis of custom or ﬁeld-programmable very-large-
scale-integration (VLSI) circuits . Accordingly,
PRALU-to-VHDL converters will make it possible to
integrate domestic CAD tools with ones accepted
This paper proposes an algorithmic method for
converting PRALU descriptions into VHDL in a
manner suitable for implementation in ﬁeld-pro-
grammable gate arrays (FPGAs), complex pro-
grammable logic devices (CPLDs), and custom
VLSI circuits alike by means of the LeonardoSpec-
trum synthesizer .
It is desirable that the reader have some familiarity
with VHDL [5–9].
DESCRIBING ALGORITHMS IN PRALU
With PRALU, a parallel algorithm for a control
unit is described in terms of statements each of
which consists of one or more chains. Listing 1
gives an example PRALU description, entitled
. This represents a typical input to
LOCON, a domestic CAD toolkit . Notice that
the fourth statement is formed by two chains, the
rest being one-chain statements.
A chain may be an
chain or an ordered
sequence made up of an
member. In the example considered, all
chains are elementary except for the one appearing in
the ﬁrst statement.
An elementary chain is deﬁned as a chain of the
is the set of beginning labels for the chain,
is the wait operator for the event ,
action operator, and
is the set of end labels for the
chain; the operator –
is allowed to be
absent from the chain .
In what follows, an elementary chain may be
referred to as a complete member.
An intermediate member is deﬁned as
An initiating member differs by a set of beginning
and a terminating member differs by a set of end labels,
A chain that is not elementary may have several inter-
mediate members, but can have only one initiating
PRALU-to-VHDL Conversion of Parallel-Algorithm
Descriptions for Control Units
P. N. Bibilo
Joint Institute of Problems of Information Science, National Academy of Sciences of Belarus, Minsk, Belarus
Received April 29, 2005
—A method is proposed for generating VHDL descriptions from ones written in the PRALU language
when developing parallel algorithms for VLSI control units. It should enable one to integrate domestic CAD
tools with ones accepted worldwide.