Operability analysis of submicron CMOS-based VLSI RAMs operated under extreme thermal conditions

Operability analysis of submicron CMOS-based VLSI RAMs operated under extreme thermal conditions Variations in the characteristics of the memory cells of submicron CMOS RAMs caused by changes in temperature were simulated and experimentally investigated in a wide temperature range of minus 50°C to +150°C. It was found that submicron VLSI circuits fabricated on the basis of the 0.35-μm bulk-CMOS technology with epitaxial layers and of the industrial 0.18-μm bulk-CMOS technology are, in the large, characterized by high maximum permissible temperatures. The simulation results were confirmed by the tests of submicron 0.35- and 0.18-μm CMOS RAMs based, respectively, on 6-transistor and 12-transistor memory cells with heavy-ion tolerant (HIT) and dual interlocked storage-cell (DICE) structures. The results of the investigation allow one to make a reasoned selection of memory cells to be used in practical embodiments of VLSI static RAMs intended to operate under extreme conditions http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Russian Microelectronics Springer Journals

Operability analysis of submicron CMOS-based VLSI RAMs operated under extreme thermal conditions

Loading next page...
 
/lp/springer_journal/operability-analysis-of-submicron-cmos-based-vlsi-rams-operated-under-1pKKBEz3dp
Publisher
SP MAIK Nauka/Interperiodica
Copyright
Copyright © 2009 by MAIK Nauka
Subject
Engineering; Electrical Engineering
ISSN
1063-7397
eISSN
1608-3415
D.O.I.
10.1134/S1063739709010065
Publisher site
See Article on Publisher Site

Abstract

Variations in the characteristics of the memory cells of submicron CMOS RAMs caused by changes in temperature were simulated and experimentally investigated in a wide temperature range of minus 50°C to +150°C. It was found that submicron VLSI circuits fabricated on the basis of the 0.35-μm bulk-CMOS technology with epitaxial layers and of the industrial 0.18-μm bulk-CMOS technology are, in the large, characterized by high maximum permissible temperatures. The simulation results were confirmed by the tests of submicron 0.35- and 0.18-μm CMOS RAMs based, respectively, on 6-transistor and 12-transistor memory cells with heavy-ion tolerant (HIT) and dual interlocked storage-cell (DICE) structures. The results of the investigation allow one to make a reasoned selection of memory cells to be used in practical embodiments of VLSI static RAMs intended to operate under extreme conditions

Journal

Russian MicroelectronicsSpringer Journals

Published: Jan 8, 2009

References

You’re reading a free preview. Subscribe to read the entire article.


DeepDyve is your
personal research library

It’s your single place to instantly
discover and read the research
that matters to you.

Enjoy affordable access to
over 12 million articles from more than
10,000 peer-reviewed journals.

All for just $49/month

Explore the DeepDyve Library

Unlimited reading

Read as many articles as you need. Full articles with original layout, charts and figures. Read online, from anywhere.

Stay up to date

Keep up with your field with Personalized Recommendations and Follow Journals to get automatic updates.

Organize your research

It’s easy to organize your research with our built-in tools.

Your journals are on DeepDyve

Read from thousands of the leading scholarly journals from SpringerNature, Elsevier, Wiley-Blackwell, Oxford University Press and more.

All the latest content is available, no embargo periods.

See the journals in your area

DeepDyve Freelancer

DeepDyve Pro

Price
FREE
$49/month

$360/year
Save searches from Google Scholar, PubMed
Create lists to organize your research
Export lists, citations
Read DeepDyve articles
Abstract access only
Unlimited access to over
18 million full-text articles
Print
20 pages/month
PDF Discount
20% off