# Negative VCC in MIM capacitors: modeling and experiments

Negative VCC in MIM capacitors: modeling and experiments After the advent of Cu and TiN metallization in high-speed and high-density radio frequency and analog/mixed-signal integrated circuits, new challenges have emerged in achieving low voltage coefficient of capacitance (VCC) in metal-insulation-metal capacitor (MIM) technology. While single layer high-k dielectric MIM capacitors fail to provide low VCC ( $$<100$$ < 100 ppm/V $$^{2}$$ 2 ), stacked high-k/ $$\hbox {SiO}_{2}$$ SiO 2 dielectrics show a promising solution as the negative VCC of $$\hbox {SiO}_{2}$$ SiO 2 cancels the positive VCC of high-k materials. To understand the mechanism and origin of negative VCC, a unified analytical model of negative VCC with experimental validation is presented in this paper. This model would be a very useful tool to design high performance MIM capacitors with ultra-low VCC for radio frequency and analog/mixed-signal integrated circuits. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Journal of Computational Electronics Springer Journals

# Negative VCC in MIM capacitors: modeling and experiments

, Volume 17 (1) – Nov 17, 2017
5 pages

/lp/springer_journal/negative-vcc-in-mim-capacitors-modeling-and-experiments-HHAz0HCmCP
Publisher
Springer US
Subject
Engineering; Mathematical and Computational Engineering; Electrical Engineering; Theoretical, Mathematical and Computational Physics; Optical and Electronic Materials; Mechanical Engineering
ISSN
1569-8025
eISSN
1572-8137
D.O.I.
10.1007/s10825-017-1110-8
Publisher site
See Article on Publisher Site

### Abstract

After the advent of Cu and TiN metallization in high-speed and high-density radio frequency and analog/mixed-signal integrated circuits, new challenges have emerged in achieving low voltage coefficient of capacitance (VCC) in metal-insulation-metal capacitor (MIM) technology. While single layer high-k dielectric MIM capacitors fail to provide low VCC ( $$<100$$ < 100 ppm/V $$^{2}$$ 2 ), stacked high-k/ $$\hbox {SiO}_{2}$$ SiO 2 dielectrics show a promising solution as the negative VCC of $$\hbox {SiO}_{2}$$ SiO 2 cancels the positive VCC of high-k materials. To understand the mechanism and origin of negative VCC, a unified analytical model of negative VCC with experimental validation is presented in this paper. This model would be a very useful tool to design high performance MIM capacitors with ultra-low VCC for radio frequency and analog/mixed-signal integrated circuits.

### Journal

Journal of Computational ElectronicsSpringer Journals

Published: Nov 17, 2017

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