ISSN 1063-7397, Russian Microelectronics, 2006, Vol. 35, No. 3, pp. 185–196. © Pleiades Publishing, Inc., 2006.
Original Russian Text © G.I. Zebrev, 2006, published in Mikroelektronika, 2006, Vol. 35, No. 3, pp. 217–229.
Although complementary metal–oxide–semicon-
ductor (CMOS) circuits are known to be sensitive to
ionization but very tolerant to displacement damage,
neutron-irradiation effects on CMOS circuits have been
widely discussed in recent years in the context of tem-
porary failures known as single-event upsets (SEUs) or
soft errors. Cosmic-ray-induced neutrons have been
found to be the main cause of SEUs in the electronic
equipment of aircraft operating at above 10 km .
The neutrons are produced by a complex, multistage
process of distributing the energy of primary cosmic
particles among secondary ones in the earth’s atmo-
sphere. Having a wide energy range, neutrons so gener-
ated are capable of causing SEUs .
SEUs are linked to local ionization effects in certain
microscopic parts of active circuit regions known as
sensitive volumes; an example is a reverse-biased drain
region of ﬁeld-effect transistors used in static or
dynamic memory. Ionizing species are generated by
The ionizing capacity of neutrons may appear insig-
niﬁcant, but it can bring about serious local effects in
the sensitive volumes of modern microelectronic
devices. This consideration is often more important
than the mean dose absorbed by a large volume.
SEUs are associated with transient photocurrents in
the silicon; they are not cumulative. Similar ionization
processes occurring within isolation oxide layers can
lead to charge buildup in some circuit elements, caus-
ing failures even at a moderate absorbed dose. Known
as single hard errors (SHEs), this type of radiation-
induced failure was discovered in the early 1990s in cir-
cuits exposed to heavy ions [3, 4]. It is commonly held
that miniaturization tends to increase the susceptibility
of circuit elements to single-event effects of this kind.
For example, Granlund
 have shown experi-
mentally that the new generation of CMOS static mem-
ory is far more sensitive to neutrons. Thus, we have
every reason to consider neutron-induced SHEs an
increasingly important issue in avionics.
The aims of this study are (i) to develop methods for
calculating the effects of high-energy neutrons on
CMOS circuit elements and (ii) to investigate the inﬂu-
ence of device scaling on the processes.
2. MECHANISMS OF NEUTRON–NUCLEUS
2.1 Inelastic Interaction
With neutron irradiation, nonionization energy loss
(NIEL) in the form of displacement damage accounts
for most of absorbed dose. Ionization is associated with
secondary particles only; these are mostly recoil nuclei
due to elastic neutron scattering and the products of
For neutron energies below 20 MeV, the dominant
type of inelastic interaction between a neutron and a
Si nucleus involves formation of an excited com-
pound nucleus by neutron absorption, followed by
emission of a proton or an alpha particle:
n–p reaction: n +
Si p +
reaction: n +
At neutron energies comparable with the mean ﬁs-
sion energy of
2 MeV), the interaction cross sec-
tion is extremely small and the threshold energy is
4 MeV. The n–
interaction cross section does not
0.1 b (10
) for any energy .
2.2 Elastic Interaction
The elastic interaction between a neutron and a
nucleus is purely mechanical scattering of the former
from the latter with the total kinetic energy conserved.
Modeling Neutron Ionization Effects
on High-Density CMOS Circuit Elements
G. I. Zebrev
Moscow Engineering Physics Institute (State University), Moscow, Russia
Received July 11, 2005
—The mechanisms are analyzed of the action of neutrons on high-density CMOS circuit elements.
A procedure is proposed for calculating the single-event-upset and single-hard-error cross sections of CMOS
memory cells exposed to neutrons.
AND SIMULATION IN SILICON MICROELECTRONICS