1063-7397/03/3201- $25.00 © 2003 MAIK “Nauka /Interperiodica”
Russian Microelectronics, Vol. 32, No. 1, 2003, pp. 25–38. Translated from Mikroelektronika, Vol. 32, No. 1, 2003, pp. 31–46.
Original Russian Text Copyright © 2003 by Belyakov, Pershenkov, Zebrev, Sogoyan, Chumakov, Nikiforov, Skorobogatov.
Operating reliability is one of primary concerns in
microelectronics. This is particularly true of space-
borne systems, since they are exposed to ionizing radi-
ation and their operating conditions allow one little
room for the repair or replacement of failed units. Much
importance is therefore attached to premission testing
followed by long-term performance prediction [1, 2].
Theoretical techniques employed should interact with
experimental ones in an iterative manner. A theoretical
model should be validated by experiment, and methods
for testing and measurement should be based on theo-
retical analysis. Moreover, it is important to select a
minimum number of simulation tests that cover two
major radiation effects [1, 2], namely, ionization and
displacement damage [3, 4]. The former may occur
both at the surface and in the bulk. The latter consists in
the displacement of atoms from their lattice sites.
Space applications are characterized by low dose
rates and large exposure times. The dose rate may vary
)/s during orbiting, so that the
total dose may be 3
rad for a ten-year
s). However, long-term prediction has
to draw on accelerated ground tests at dose rates much
higher than actual ones, hence the need for physical
models of degradation processes. Total-dose effects are
commonly simulated with an x-ray source of mean
photon energy about 10 keV [3, 5].
INTERFACE IONIZATION EFFECTS
IN BIPOLAR TRANSISTORS
Among semiconductor devices, bipolar junction
transistors (BJTs) were the ﬁrst to experience ionizing
irradiation in space. As is well known, the initial impe-
tus for research on radiation-hardened electronics came
from the radiation-induced gain degradation in the
equipment of Telstar due to its crossing of artiﬁcial
Early efforts in radiation-hardened design addressed
structural and bulk ionization effects, but the advent of
LSI and VLSI circuits and the concomitant decrease in
feature sizes have shifted the focus to surface effects.
These are linked with the buildup of interface traps and
space charge in the ﬁeld oxide near the edge of the
emitter–base junction. Figure 1 illustrates the phenom-
ena by sketching a cross section of the ﬁeld oxide and
the emitter region in a planar transistor, with
denoting the surface- and the bulk-recombination cur-
Methods for the Prediction of Total-Dose Effects on Modern
Integrated Semiconductor Devices in Space: A Review
V. V. Belyakov, V. S. Pershenkov, G. I. Zebrev, A. V. Sogoyan,
A. I. Chumakov, A. Y. Nikiforov, and P. K. Skorobogatov
Moscow State Institute of Engineering Physics, Moscow, Russia
ENPO Spetsializirovannye elektronnye sistemy, Moscow, Russia
Received March 25, 2002
—Ionizing-radiation effects on space microelectronics are addressed. Major approaches to the radia-
tion-hardness evaluation of IC components in terms of total-dose effects at low dose rates are reviewed. The
main mechanisms and kinetic models of radiation degradation are discussed from the standpoint of the predic-
tion of IC radiation response.
Schematic (a) top and (b) cross-sectional views of
the emitter region in a planar BJT using ﬁeld oxide.