ISSN 1063-7397, Russian Microelectronics, 2007, Vol. 36, No. 1, pp. 56–66. © Pleiades Publishing, Ltd., 2007.
Original Russian Text © A.S. Korotkov, M.V. Telenkov, 2007, published in Mikroelektronika, 2007, Vol. 36, No. 1, pp. 66–77.
Analog-to-digital converters (ADCs) employing
modulation combine input-signal tracking with integra-
tion and balancing [1, 2]. They offer high resolution,
consume reasonable power, and occupy a small chip
area. At the same time, their clock rate being two orders
of magnitude higher than the Nyquist rate creates spe-
cial difﬁculties to circuit designers.
The performance of a
ADC is largely deter-
mined by its
modulator. This in turn is mainly
characterized by its signal-to-noise ratio (SNR),
which is deﬁned as the ratio of the maximum allow-
able input amplitude (in terms of avoiding overload-
ing) to the root-mean-square noise voltage present in
the output bandwidth. The SNR of the
is important because it governs the dynamic range
and hence the resolution of the ADC. The SNR is
evaluated by deriving an output spectrum from a cal-
culated time-domain response of the
Unfortunately, with the clock rate so high relative to
input frequencies, a computer simulation of a
modulator has to be run on a timescale of tens of
thousands of clock periods.
For the above reason, general-purpose simulators
such as SPICE have proved inadequate in this ﬁeld.
Working at the component level, SPICE describes a cir-
cuit by differential equations and integrates them with
a time step equal to the shortest time constant of the cir-
cuit . As a result, there is an acute need for simulators
It is appropriate for such a simulator to treat a
modulator at the block or circuit level. The former strat-
egy represents a modulator as a network of building
blocks each of which is described by a speciﬁc transfer
function. It has the advantages of being realization-
independent and comparatively fast, but gives only a
general picture of how a modulator would perform. Cir-
cuit-level simulation yields more accurate predictions
but takes more computational time. Thus, the two strat-
egies complement each other.
A switched-capacitor (SC) realization of a
modulator includes operational ampliﬁers (opamps),
capacitors, and metal–oxide–semiconductor ﬁeld-
effect transistors (MOSFETs) operated in switching
mode. Each opamp is represented as a voltage-con-
trolled current source, and each switch as a resistor
whose value changes with switching phase. The
response of a
modulator is calculated by nodal
analysis using a system of differential equations in
the time domain.
This paper presents a new methodology for circuit-
level modeling of SC
modulators that takes account
of the switch resistances, the gain–bandwidth products
(GBWs) of the opamps, the nonlinear behavior of the
active elements, etc. Some simulation results obtained
within this framework are reported.
The paper is organized as follows. Section 2 gives
an overview of special-purpose simulators available.
Section 3 describes our methodology with regard to lin-
ear distortions. Section 4 is concerned with nonlinear-
distortion analysis. Section 5 reports simulation results.
Section 6 presents our conclusions.
Linear and Nonlinear Modeling
A. S. Korotkov and M. V. Telenkov
St. Petersburg State Technical University, St. Petersburg, Russia
Received December 21, 2005
—A new methodology is presented for both linear and nonlinear circuit-level modeling of switched-
modulators. It takes account of the MOSFET parasitic capacitances, switch on-resistances, opamp
gain–bandwidth products, the nonlinear behavior of the parasitic capacitances and opamps, clock jitter, etc.
Mathematically, a system of circuit equations is constructed by nodal analysis in the frequency domain, and its
solutions in the form of Volterra series are mapped into the time domain by numerical Laplace inversion. The
methodology can be used for nonlinear-distortion analysis. It is implemented in software within MATLAB.
PACS numbers: 84.30.Vn