Integration solutions for reconfigurable multi-standard wireless transceivers

Integration solutions for reconfigurable multi-standard wireless transceivers This article presents an overview of modern integration concepts for receiver, transmitter and duplexer architectures. Based on innovative design techniques, a system-in-package integrated RF transceiver architecture is proposed as a low-cost low-power alternative to traditional multi-standard transceivers. The proposed transceiver architecture unites advantages of a sub-sampling receiver with tunable low noise amplifier (LNA), a high-efficiency digital power amplifier and an integrated duplexer with on-package passive components in order to fulfill the more and more stringent requirements for wireless systems. In addition to the transceiver architecture, measurement results of building blocks are presented. A LNA circuit implemented in 65 nm $65~\text{nm}$ CMOS technology provides a continuously tunable-gain (3–23 dB) and a tunable frequency band (4.5 GHz–5.5 GHz) with noise figure of 2 dB $2~\text{dB}$ and IIP3 of − 6.5 dBm $-6.5~\text{dBm}$ at the highest gain. A high Q-factor, on-package transformer, implemented in a core-less 3-metal layer system-in-package substrate, presents a coupling factor of 0.6 and a Q-factor of approximately 30. This provides a low-cost, high-performance alternative solution to integrated matching networks and duplexers. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png e & i Elektrotechnik und Informationstechnik Springer Journals

Integration solutions for reconfigurable multi-standard wireless transceivers

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Publisher
Springer Vienna
Copyright
Copyright © 2018 by The Author(s)
Subject
Engineering; Electrical Engineering; Computer Hardware; Software Engineering/Programming and Operating Systems
ISSN
0932-383X
eISSN
1613-7620
D.O.I.
10.1007/s00502-018-0595-6
Publisher site
See Article on Publisher Site

Abstract

This article presents an overview of modern integration concepts for receiver, transmitter and duplexer architectures. Based on innovative design techniques, a system-in-package integrated RF transceiver architecture is proposed as a low-cost low-power alternative to traditional multi-standard transceivers. The proposed transceiver architecture unites advantages of a sub-sampling receiver with tunable low noise amplifier (LNA), a high-efficiency digital power amplifier and an integrated duplexer with on-package passive components in order to fulfill the more and more stringent requirements for wireless systems. In addition to the transceiver architecture, measurement results of building blocks are presented. A LNA circuit implemented in 65 nm $65~\text{nm}$ CMOS technology provides a continuously tunable-gain (3–23 dB) and a tunable frequency band (4.5 GHz–5.5 GHz) with noise figure of 2 dB $2~\text{dB}$ and IIP3 of − 6.5 dBm $-6.5~\text{dBm}$ at the highest gain. A high Q-factor, on-package transformer, implemented in a core-less 3-metal layer system-in-package substrate, presents a coupling factor of 0.6 and a Q-factor of approximately 30. This provides a low-cost, high-performance alternative solution to integrated matching networks and duplexers.

Journal

e & i Elektrotechnik und InformationstechnikSpringer Journals

Published: Feb 21, 2018

References

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