Implementation of Digital Watermarking Algorithms in Parallel Hardware Accelerators

Implementation of Digital Watermarking Algorithms in Parallel Hardware Accelerators The paper is focused on computing acceleration for hybrid multiprocessor environment. A considered algorithm of content authentication used for digital images and video sequences is implemented and tested in diverse scenarios. Particular goal is capability of the authentication system to process high-resolution digital images or FullHD video sequences in real time. Aim of this work was to explore and take advantage of mixed CPU and GPU processing approach and to investigate possibilities to develop optimal authentication algorithm. Chosen algorithm is based on robust hashes and semi-fragile digital watermarking. Parallelization was achieved using combined OpenCL and OpenMP. Results for time execution were measured for both images and videos. Based on collected results acceleration rates were calculated along with maximum frames per second values for video processing. It can be concluded that parallelism contributes significantly in reducing the computation time by making optimal use of resources. Depending on the test scenario, the rate of acceleration is even thirty times higher comparing with single-core solutions. Introduced modifications reduce execution time while maintaining detection effectiveness. International Journal of Parallel Programming Springer Journals

Implementation of Digital Watermarking Algorithms in Parallel Hardware Accelerators

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Springer US
Copyright © 2016 by Springer Science+Business Media New York
Computer Science; Theory of Computation; Processor Architectures; Software Engineering/Programming and Operating Systems
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