A theoretical investigation is carried out into memory cells based on a polysilicon–oxide–nitride–oxide–silicon structure in which a high-permittivity dielectric is used instead of SiO2 as the gate insulator. The dielectric is taken to be Al2O3 or ZrO2. Write/erase (W/E) cycles are simulated numerically. It is shown for the first time that changing to a high-permittivity insulator reduces the unwanted carrier injection from the gate region and allows one to employ lower and/or shorter W/E pulses; specifically, the W/E time can be decreased from 1 ms to 10 μs. It is concluded that high-permittivity insulators might be useful in carrier-trapping EEPROMs and RAMs.
Russian Microelectronics – Springer Journals
Published: Oct 11, 2004
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