Hardware Support for Interval Arithmetic

Hardware Support for Interval Arithmetic A hardware unit for interval arithmetic (including division by an interval that contains zero) is described in this paper. After a brief introduction an instruction set for interval arithmetic is defined which is attractive from the mathematical point of view. These instructions consist of the basic arithmetic operations and comparisons for intervals including the relevant lattice operations. To enable high speed, the case selections for interval multiplication (9 cases) and interval division (14 cases) are done in hardware. The lower bound of the result is computed with rounding downwards and the upper bound with rounding upwards by parallel units simultaneously. The rounding mode must be an integral part of the arithmetic operation. Also the basic comparisons for intervals together with the corresponding lattice operations and the result selection in more complicated cases of multiplication and division are done in hardware. There they are executed by parallel units simultaneously. The circuits described in this paper show that with modest additional hardware costs interval arithmetic can be made almost as fast as simple floating-point arithmetic. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Reliable Computing Springer Journals

Hardware Support for Interval Arithmetic

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Publisher
Springer Journals
Copyright
Copyright © 2006 by Springer Science + Business Media, Inc.
Subject
Mathematics; Numeric Computing; Approximations and Expansions; Computational Mathematics and Numerical Analysis; Mathematical Modeling and Industrial Mathematics
ISSN
1385-3139
eISSN
1573-1340
D.O.I.
10.1007/s11155-006-7220-9
Publisher site
See Article on Publisher Site

Abstract

A hardware unit for interval arithmetic (including division by an interval that contains zero) is described in this paper. After a brief introduction an instruction set for interval arithmetic is defined which is attractive from the mathematical point of view. These instructions consist of the basic arithmetic operations and comparisons for intervals including the relevant lattice operations. To enable high speed, the case selections for interval multiplication (9 cases) and interval division (14 cases) are done in hardware. The lower bound of the result is computed with rounding downwards and the upper bound with rounding upwards by parallel units simultaneously. The rounding mode must be an integral part of the arithmetic operation. Also the basic comparisons for intervals together with the corresponding lattice operations and the result selection in more complicated cases of multiplication and division are done in hardware. There they are executed by parallel units simultaneously. The circuits described in this paper show that with modest additional hardware costs interval arithmetic can be made almost as fast as simple floating-point arithmetic.

Journal

Reliable ComputingSpringer Journals

Published: Jan 1, 2006

References

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