# Fast clique minor generation in Chimera qubit connectivity graphs

Fast clique minor generation in Chimera qubit connectivity graphs The current generation of D-Wave quantum annealing processor is designed to minimize the energy of an Ising spin configuration whose pairwise interactions lie on the edges of a Chimera graph $${\mathcal {C}}_{M,N,L}$$ C M , N , L . In order to solve an Ising spin problem with arbitrary pairwise interaction structure, the corresponding graph must be minor-embedded into a Chimera graph. We define a combinatorial class of native clique minors in Chimera graphs with vertex images of uniform, near minimal size and provide a polynomial-time algorithm that finds a maximum native clique minor in a given induced subgraph of a Chimera graph. These minors allow improvement over recent work and have immediate practical applications in the field of quantum annealing. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Quantum Information Processing Springer Journals

# Fast clique minor generation in Chimera qubit connectivity graphs

, Volume 15 (1) – Oct 27, 2015
14 pages

/lp/springer_journal/fast-clique-minor-generation-in-chimera-qubit-connectivity-graphs-qM2LOlXF0L
Publisher
Springer US
Subject
Physics; Quantum Information Technology, Spintronics; Quantum Computing; Data Structures, Cryptology and Information Theory; Quantum Physics; Mathematical Physics
ISSN
1570-0755
eISSN
1573-1332
D.O.I.
10.1007/s11128-015-1150-6
Publisher site
See Article on Publisher Site

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