Development of design flow for multiported register files, which includes a cell library and a compiler for SOI 0.25-μm process

Development of design flow for multiported register files, which includes a cell library and a... A typical design flow for a high-performance System-on-Chip usually includes memory compilers, which are implemented by different CAD producers for a given technology. These compilers allow to create automatically all file views for a memory unit using its configuration given by a user. However, there was no memory compiler for a 0.25-micron CMOS SOI process used in some our projects. At the same time, chips we were developing in this process had a wide variety of memories including register files. We developed new design approach and patented a multiported modular bitcell. Additionally, a schematic and layout library of basic cells was created to implement register files with different number of read and write ports. This gave rise to development of design flow and a program, which generates typical file views automatically. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Russian Microelectronics Springer Journals

Development of design flow for multiported register files, which includes a cell library and a compiler for SOI 0.25-μm process

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Publisher
Springer Journals
Copyright
Copyright © 2017 by Pleiades Publishing, Ltd.
Subject
Engineering; Electrical Engineering
ISSN
1063-7397
eISSN
1608-3415
D.O.I.
10.1134/S1063739717010048
Publisher site
See Article on Publisher Site

Abstract

A typical design flow for a high-performance System-on-Chip usually includes memory compilers, which are implemented by different CAD producers for a given technology. These compilers allow to create automatically all file views for a memory unit using its configuration given by a user. However, there was no memory compiler for a 0.25-micron CMOS SOI process used in some our projects. At the same time, chips we were developing in this process had a wide variety of memories including register files. We developed new design approach and patented a multiported modular bitcell. Additionally, a schematic and layout library of basic cells was created to implement register files with different number of read and write ports. This gave rise to development of design flow and a program, which generates typical file views automatically.

Journal

Russian MicroelectronicsSpringer Journals

Published: Mar 11, 2017

References

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