The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results.
Russian Microelectronics – Springer Journals
Published: Jan 15, 2011
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