Considering nearest neighbor constraints of quantum circuits at the reversible circuit level

Considering nearest neighbor constraints of quantum circuits at the reversible circuit level Since many underlying quantum algorithms include a Boolean component, synthesis of the respective circuits is often conducted by a two-stage procedure: First, a reversible circuit realizing the Boolean component is generated. Afterwards, this circuit is mapped into a respective quantum gate cascade. In addition, recent physical accomplishments have led to further issues to be considered, e.g. nearest neighbor constraints. However, due to the lack of proper metrics, these constraints usually have been addressed at the quantum circuit level only. In this paper, we present an approach that allows the consideration of nearest neighbor constraints already at the reversible circuit level. For this purpose, a recently introduced gate library is assumed for which a proper metric is proposed. By means of an optimization approach, the applicability of the proposed scheme is illustrated. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Quantum Information Processing Springer Journals

Considering nearest neighbor constraints of quantum circuits at the reversible circuit level

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Publisher
Springer Journals
Copyright
Copyright © 2013 by Springer Science+Business Media New York
Subject
Physics; Quantum Information Technology, Spintronics; Quantum Computing; Data Structures, Cryptology and Information Theory; Quantum Physics; Mathematical Physics
ISSN
1570-0755
eISSN
1573-1332
D.O.I.
10.1007/s11128-013-0642-5
Publisher site
See Article on Publisher Site

Abstract

Since many underlying quantum algorithms include a Boolean component, synthesis of the respective circuits is often conducted by a two-stage procedure: First, a reversible circuit realizing the Boolean component is generated. Afterwards, this circuit is mapped into a respective quantum gate cascade. In addition, recent physical accomplishments have led to further issues to be considered, e.g. nearest neighbor constraints. However, due to the lack of proper metrics, these constraints usually have been addressed at the quantum circuit level only. In this paper, we present an approach that allows the consideration of nearest neighbor constraints already at the reversible circuit level. For this purpose, a recently introduced gate library is assumed for which a proper metric is proposed. By means of an optimization approach, the applicability of the proposed scheme is illustrated.

Journal

Quantum Information ProcessingSpringer Journals

Published: Sep 24, 2013

References

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