Circuit-level simulation of resistive-switching random-access memory cross-point array based on a highly reliable compact model

Circuit-level simulation of resistive-switching random-access memory cross-point array based on a... In this study, a simple, reliable, and universal circuit model of bipolar resistive-switching random-access memory (RRAM) is presented for the circuit-level simulation of a high-density cross-point RRAM array. For higher accuracy and reliability, the compact model has been developed to match the measurement data of the fabricated RRAM devices with $$\hbox {SiN}_{{x}}$$ SiN x and $$\hbox {HfO}_{{x}}$$ HfO x switching layers showing different reset switching behaviors. In the SPICE simulation, the RRAM cross-point array is virtually realized by embedding the empirically modeled memory cells, by which device performances such as read margin and power consumption in the high-density array are closely investigated. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Journal of Computational Electronics Springer Journals

Circuit-level simulation of resistive-switching random-access memory cross-point array based on a highly reliable compact model

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Publisher
Springer US
Copyright
Copyright © 2017 by Springer Science+Business Media, LLC, part of Springer Nature
Subject
Engineering; Mathematical and Computational Engineering; Electrical Engineering; Theoretical, Mathematical and Computational Physics; Optical and Electronic Materials; Mechanical Engineering
ISSN
1569-8025
eISSN
1572-8137
D.O.I.
10.1007/s10825-017-1116-2
Publisher site
See Article on Publisher Site

Abstract

In this study, a simple, reliable, and universal circuit model of bipolar resistive-switching random-access memory (RRAM) is presented for the circuit-level simulation of a high-density cross-point RRAM array. For higher accuracy and reliability, the compact model has been developed to match the measurement data of the fabricated RRAM devices with $$\hbox {SiN}_{{x}}$$ SiN x and $$\hbox {HfO}_{{x}}$$ HfO x switching layers showing different reset switching behaviors. In the SPICE simulation, the RRAM cross-point array is virtually realized by embedding the empirically modeled memory cells, by which device performances such as read margin and power consumption in the high-density array are closely investigated.

Journal

Journal of Computational ElectronicsSpringer Journals

Published: Dec 7, 2017

References

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