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A novel high performance LDMOS transistor with high channel density

A novel high performance LDMOS transistor with high channel density In this paper, we propose a novel high channel density LDMOS transistor (HCD-LDMOS) with low specific on-resistance and high transconductance. This is achieved primarily through increased channel density to improve transistor performance via the creation of a U-shaped structure. The channel density is significantly increased when one extra etching process is added to create the U-shaped structure, resulting in a 68.42% reduction in specific on-resistance compared with a conventional structure (C-LDMOS). In addition, the gate control over the channel of the HCD-LDMOS is improved, and a marked increase in the peak transconductance value is achieved. Another key advantage is the lower electron temperature relative to the C-LDMOS. Using the U-shaped formation of the HCD-LDMOS structure, increases the uniformity of the electric field. This smoothing effect leads to a reduction in electron temperature and greater device reliability. The only difference between the C-LDMOS and the proposed structure is the addition of one extra etching process. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Journal of Computational Electronics Springer Journals

A novel high performance LDMOS transistor with high channel density

Pak, Amin; Orouji, Ali
Journal of Computational Electronics , Volume 17 (1) – Sep 15, 2017
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References (26)

Publisher
Springer Journals
Copyright
Copyright © 2017 by Springer Science+Business Media, LLC
Subject
Engineering; Mathematical and Computational Engineering; Electrical Engineering; Theoretical, Mathematical and Computational Physics; Optical and Electronic Materials; Mechanical Engineering
ISSN
1569-8025
eISSN
1572-8137
DOI
10.1007/s10825-017-1064-x
Publisher site
See Article on Publisher Site

Abstract

In this paper, we propose a novel high channel density LDMOS transistor (HCD-LDMOS) with low specific on-resistance and high transconductance. This is achieved primarily through increased channel density to improve transistor performance via the creation of a U-shaped structure. The channel density is significantly increased when one extra etching process is added to create the U-shaped structure, resulting in a 68.42% reduction in specific on-resistance compared with a conventional structure (C-LDMOS). In addition, the gate control over the channel of the HCD-LDMOS is improved, and a marked increase in the peak transconductance value is achieved. Another key advantage is the lower electron temperature relative to the C-LDMOS. Using the U-shaped formation of the HCD-LDMOS structure, increases the uniformity of the electric field. This smoothing effect leads to a reduction in electron temperature and greater device reliability. The only difference between the C-LDMOS and the proposed structure is the addition of one extra etching process.

Journal

Journal of Computational Electronics – Springer Journals

Published: Sep 15, 2017

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