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Design of CMOS Analog Integrated Fractional-Order CircuitsConclusions and Motivation for Future Work

Design of CMOS Analog Integrated Fractional-Order Circuits: Conclusions and Motivation for Future... [Throughout this work the second-order approximation of the CFE is utilized in order to present a systematic way for describing the design equations of fractional-order generalized transfer functions. Thus, fractional-order transfer functions are approximated using integer-order transfer functions, which are easy to realize. The main active cells that are employed are current mirrors, nonlinear transconductance cells (known as S, C cells), and OTAs, which are very attractive building blocks offering the capability of implementing resistorless realizations with electronic tuning, where only grounded capacitors are employed. As a result, the designer has only to choose the appropriate values of DC bias currents in order to realize the desired transfer function. Taking into account that MOS transistors are biased in subthreshold region, these topologies are able to operate in a low-voltage environment with reduced power consumption, making them attractive candidates for realizing fractional-order circuits in various interdisciplinary applications.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

Design of CMOS Analog Integrated Fractional-Order CircuitsConclusions and Motivation for Future Work

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Publisher
Springer International Publishing
Copyright
© The Author(s) 2017
ISBN
978-3-319-55632-1
Pages
113 –114
DOI
10.1007/978-3-319-55633-8_7
Publisher site
See Chapter on Publisher Site

Abstract

[Throughout this work the second-order approximation of the CFE is utilized in order to present a systematic way for describing the design equations of fractional-order generalized transfer functions. Thus, fractional-order transfer functions are approximated using integer-order transfer functions, which are easy to realize. The main active cells that are employed are current mirrors, nonlinear transconductance cells (known as S, C cells), and OTAs, which are very attractive building blocks offering the capability of implementing resistorless realizations with electronic tuning, where only grounded capacitors are employed. As a result, the designer has only to choose the appropriate values of DC bias currents in order to realize the desired transfer function. Taking into account that MOS transistors are biased in subthreshold region, these topologies are able to operate in a low-voltage environment with reduced power consumption, making them attractive candidates for realizing fractional-order circuits in various interdisciplinary applications.]

Published: Apr 13, 2017

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