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Controlling Energy Demand in Mobile Computing SystemsDynamic Voltage Scheduling (DVS)

Controlling Energy Demand in Mobile Computing Systems: Dynamic Voltage Scheduling (DVS) [This chapter discusses scheduling policies that exploit dynamic frequency and voltage scaling in processors. The strength of scaling frequency and voltage together is that it provides quadratic energy savings with only a linear performance cost, as explained in Section 2.1.3. Table 2.2 gives several examples of processor chips with voltage scaling capabilities. In current practice, these features are used in simple policies such as setting voltage and frequency based on whether the power source is AC or battery. However, the potential for fine-grained policies that exploit dynamic voltage scaling lies in using the slowdown to squeeze out processor idle cycles that might occur at the end of a task when it is run at the maximum processor speed, replacing those idle cycles with continuous processing at a lower speed and voltage level.] http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png

Controlling Energy Demand in Mobile Computing SystemsDynamic Voltage Scheduling (DVS)

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Publisher
Springer International Publishing
Copyright
© Springer Nature Switzerland AG 2007
ISBN
978-3-031-01347-8
Pages
39 –54
DOI
10.1007/978-3-031-02475-7_4
Publisher site
See Chapter on Publisher Site

Abstract

[This chapter discusses scheduling policies that exploit dynamic frequency and voltage scaling in processors. The strength of scaling frequency and voltage together is that it provides quadratic energy savings with only a linear performance cost, as explained in Section 2.1.3. Table 2.2 gives several examples of processor chips with voltage scaling capabilities. In current practice, these features are used in simple policies such as setting voltage and frequency based on whether the power source is AC or battery. However, the potential for fine-grained policies that exploit dynamic voltage scaling lies in using the slowdown to squeeze out processor idle cycles that might occur at the end of a task when it is run at the maximum processor speed, replacing those idle cycles with continuous processing at a lower speed and voltage level.]

Published: Jan 1, 2007

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