A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless ChannelA Zero-Crossing Algorithm-Based Digital Phase-Locked Loop
A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel: A...
Purkayastha, Basab Bijoy; Sarma, Kandarpa Kumar
2015-01-30 00:00:00
[The structure of a Digital Phase-Locked Loop (DPLL)-based systems for dealing with Nakagami-m fading is proposed in this chapter. The emphasis of the work is the implementation of the essential components of a DPLL for better reception of signals with certain modulation transmitted through Nakagami-m channels. A sixth order polynomial fitting algorithm for better phase-frequency detection has been implemented, which has helped to attain optimum performance of DPLL. The results of simulation of the proposed DPLL with Nakagami-m fading and QPSK modulation shows that the proposed method provides better performance than existing systems of similar type.]
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A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless ChannelA Zero-Crossing Algorithm-Based Digital Phase-Locked Loop
[The structure of a Digital Phase-Locked Loop (DPLL)-based systems for dealing with Nakagami-m fading is proposed in this chapter. The emphasis of the work is the implementation of the essential components of a DPLL for better reception of signals with certain modulation transmitted through Nakagami-m channels. A sixth order polynomial fitting algorithm for better phase-frequency detection has been implemented, which has helped to attain optimum performance of DPLL. The results of simulation of the proposed DPLL with Nakagami-m fading and QPSK modulation shows that the proposed method provides better performance than existing systems of similar type.]
Published: Jan 30, 2015
Keywords: Digital phase-locked loop; Zero-crossing phase frequency detector; Numerically controlled oscillator; Nakagami-m fading channels; Polynomial fitting filter
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