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Single-loop sigma delta modulator design and verification for cognitive IoT applications

Single-loop sigma delta modulator design and verification for cognitive IoT applications A third-order discrete time sigma delta modulator (SDM) is proposed with optimum performance by addressing instability and power dissipations issues, and a novel SDM architecture is designed and verified in behavioural modelling in MATLAB/SIMULINK environment. Simulation results show that performance parameters of proposed modulator achieved SNR of 105.41 dB, SNDR of 101.96 dB and DR of 17 bits for the signal bandwidth of 20 kHz.Design/methodology/approachThis paper describes single-loop SDM design with optimum selection of integrator weights for physiological signal processing in IoT applications.FindingsThe proposed discrete time modulator designed with 1-bit quantizer and optimum oversampling ratio proved as power efficient. Integrator scaling coefficients are generated in LabVIEW environment for pure third-order noise shaping.Originality/valueThis paper contains the novelty in the work, and it is suitable for cognitive Internet of Things applications. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png International Journal of Pervasive Computing and Communications Emerald Publishing

Single-loop sigma delta modulator design and verification for cognitive IoT applications

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References (15)

Publisher
Emerald Publishing
Copyright
© Emerald Publishing Limited
ISSN
1742-7371
eISSN
1742-7371
DOI
10.1108/ijpcc-04-2020-0026
Publisher site
See Article on Publisher Site

Abstract

A third-order discrete time sigma delta modulator (SDM) is proposed with optimum performance by addressing instability and power dissipations issues, and a novel SDM architecture is designed and verified in behavioural modelling in MATLAB/SIMULINK environment. Simulation results show that performance parameters of proposed modulator achieved SNR of 105.41 dB, SNDR of 101.96 dB and DR of 17 bits for the signal bandwidth of 20 kHz.Design/methodology/approachThis paper describes single-loop SDM design with optimum selection of integrator weights for physiological signal processing in IoT applications.FindingsThe proposed discrete time modulator designed with 1-bit quantizer and optimum oversampling ratio proved as power efficient. Integrator scaling coefficients are generated in LabVIEW environment for pure third-order noise shaping.Originality/valueThis paper contains the novelty in the work, and it is suitable for cognitive Internet of Things applications.

Journal

International Journal of Pervasive Computing and CommunicationsEmerald Publishing

Published: Jul 21, 2021

Keywords: IoT; Sigma delta modulator; SNDR; Ultra-low power; SNDR; Dynamic Range; Over sampling ratio

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