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Self‐assembly: a review of recent developments

Self‐assembly: a review of recent developments Purpose – The purpose of this paper is to provide a review of recent progress in self‐assembly technology, principally in the microelectronics context. Design/methodology/approach – First, the paper discusses the application of nanoscale self‐assembly techniques to microelectronic and related components and then considers research involving larger devices. Findings – The paper shows that a range of self‐assembly techniques is being used to fabricate both production and experimental microelectronic devices, often with the aim of developing alternatives to copper wire interconnects. Other, experimental self‐assembly techniques are being developed for the packaging and mounting of microelectronic components on substrates. Originality/value – Provides a useful, detailed review of the use of self‐assembly techniques at the nanoscale, microscale and macroscale. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Assembly Automation Emerald Publishing

Self‐assembly: a review of recent developments

Robert Bogue
Assembly Automation , Volume 28 (3): 5 – Aug 1, 2008
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5 pages

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Publisher
Emerald Publishing
Copyright
Copyright © 2008 Emerald Group Publishing Limited. All rights reserved.
ISSN
0144-5154
DOI
10.1108/01445150810889466
Publisher site
See Article on Publisher Site

Abstract

Purpose – The purpose of this paper is to provide a review of recent progress in self‐assembly technology, principally in the microelectronics context. Design/methodology/approach – First, the paper discusses the application of nanoscale self‐assembly techniques to microelectronic and related components and then considers research involving larger devices. Findings – The paper shows that a range of self‐assembly techniques is being used to fabricate both production and experimental microelectronic devices, often with the aim of developing alternatives to copper wire interconnects. Other, experimental self‐assembly techniques are being developed for the packaging and mounting of microelectronic components on substrates. Originality/value – Provides a useful, detailed review of the use of self‐assembly techniques at the nanoscale, microscale and macroscale.

Journal

Assembly Automation – Emerald Publishing

Published: Aug 1, 2008

Keywords: Assembly; Nanotechnology; Electronic engineering; Microprocessor chips; Polymers

References

  • Assembly of aligned linear metallic patterns on silicon
    Chai, J.; Wang, D.; Fan, X.; Buriak, J.M.
  • A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors
    Close, G.F.; Yasuda, S.; Paul, B.; Fujita, S.; Wong, H‐S.P.
  • Wafer‐level packaging based on uniquely orienting self‐assembly (the DUO‐SPASS processes)
    Fang, J.; Böhringer, K.F.
  • Low voltage, scalable nanocrystal FLASH memory fabricated by templated self assembly
    Guarini, K.W.; Black, C.T.; Zhang, Y.; Babich, I.V.; Sikorski, E.M.; Gignac, L.M.
  • Engineered solder‐directed self‐assembly across length scales
    Knuesel, R.; Bose, S.; Zheng, W.; Jacobs, H.O.
  • Bottom‐up assembly of large‐area nanowire resonator arrays
    Li, M.; Bhiladvala, R.B.; Morrow, T.; Sioss, J.; Lew, K‐K.; Redwing, J.M.; Keating, C.D.; Mayer, T.S.