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PriceDensity Tradeoffs of Multichip Modules

PriceDensity Tradeoffs of Multichip Modules When designing electronic systems it is very useful to analyse the relationship between the interconnection capacity of selected packaging methods and their prices. Such an analysis is provided for the entire gamut of the interconnection spectrum from onesided PCBs to complex ICs, by a plot of the log of substrate pricesq. inch versus the log of substrate density expressed in inches of conductorssq. inch of substrate. The use of such a graphic method of analysis can produce interesting and useful insights into the potentials and tradeoffs between various current and future IC packaging approaches. After a short description and analysis of that loglog plot, this paper will apply this methodology to the derivation of the general cost relation of IC interconnections on the next level of substrates. It specifically will attempt to establish a general price relationship between packaging approaches using bare uncased chips and the chips packaged in individual packages. As a result, the costeffectiveness of the use of Multichip Module technology in the regions of very high interconnection densities will be derived and its competitiveness against other interconnection methods will be analysed. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Microelectronics International Emerald Publishing

PriceDensity Tradeoffs of Multichip Modules

Microelectronics International , Volume 6 (2): 5 – Feb 1, 1989

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Publisher
Emerald Publishing
Copyright
Copyright © Emerald Group Publishing Limited
ISSN
1356-5362
DOI
10.1108/eb044365
Publisher site
See Article on Publisher Site

Abstract

When designing electronic systems it is very useful to analyse the relationship between the interconnection capacity of selected packaging methods and their prices. Such an analysis is provided for the entire gamut of the interconnection spectrum from onesided PCBs to complex ICs, by a plot of the log of substrate pricesq. inch versus the log of substrate density expressed in inches of conductorssq. inch of substrate. The use of such a graphic method of analysis can produce interesting and useful insights into the potentials and tradeoffs between various current and future IC packaging approaches. After a short description and analysis of that loglog plot, this paper will apply this methodology to the derivation of the general cost relation of IC interconnections on the next level of substrates. It specifically will attempt to establish a general price relationship between packaging approaches using bare uncased chips and the chips packaged in individual packages. As a result, the costeffectiveness of the use of Multichip Module technology in the regions of very high interconnection densities will be derived and its competitiveness against other interconnection methods will be analysed.

Journal

Microelectronics InternationalEmerald Publishing

Published: Feb 1, 1989

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