Get 20M+ Full-Text Papers For Less Than $1.50/day. Start a 14-Day Trial for You or Your Team.

Learn More →

Introduction to Thick Film Fine Line Printing Screens

Introduction to Thick Film Fine Line Printing Screens Military and commercial hybrids, using high speed integrated circuits with increased inputoutput density, require low cost, high reliability thick film circuits providing high density, multilayered interconnections with controllable electrical and mechanical characteristics. To meet these criteria it was necessary to adapt the silk screen printing process, including design, materials and reproduction processes, to cater for thick film, that is able to reproduce extremely fine lines without sacrificing the edge definition of the circuit layout. Printing screens were developed to deposit gold and silver pastes with linespace widths of 50 microns 0.002 in. on bare ceramic and 100 microns 0.004 in. on dielectric layers. Interconnection between layers was achieved with 150 micron 0.006 in. dielectric via openings with corresponding viafill conductive connections gold or silver. The development of the photoimage onto the emulsion of the screen was deemed to be the most important single step in determining the final print definition of the circuit's design. The main body of this work was concentrated on this approach. The selection of the screens, emulsion system, UV exposure and development processes are also discussed. A capability circuit CQC was produced, consisting of five metal layers with linespaces of 100 microns connected on each side of the ceramic by front to back lasered throughhole connections of 125 microns 0.005 in. and layer interconnections through 150 micron 0.006 in. dielectric vias. This capability circuit is classed as an Electronic Component of Assessed Quality by Capability Approval in accordance with BS 63200. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Microelectronics International Emerald Publishing

Introduction to Thick Film Fine Line Printing Screens

Carr, B.P.
Microelectronics International , Volume 11 (1): 4 – Jan 1, 1994
Download PDF
4 pages

Loading next page...
 
/lp/emerald-publishing/introduction-to-thick-film-fine-line-printing-screens-vtx7eW3yMt

References

References for this paper are not available at this time. We will be adding them shortly, thank you for your patience.

Publisher
Emerald Publishing
Copyright
Copyright © Emerald Group Publishing Limited
ISSN
1356-5362
DOI
10.1108/eb044515
Publisher site
See Article on Publisher Site

Abstract

Military and commercial hybrids, using high speed integrated circuits with increased inputoutput density, require low cost, high reliability thick film circuits providing high density, multilayered interconnections with controllable electrical and mechanical characteristics. To meet these criteria it was necessary to adapt the silk screen printing process, including design, materials and reproduction processes, to cater for thick film, that is able to reproduce extremely fine lines without sacrificing the edge definition of the circuit layout. Printing screens were developed to deposit gold and silver pastes with linespace widths of 50 microns 0.002 in. on bare ceramic and 100 microns 0.004 in. on dielectric layers. Interconnection between layers was achieved with 150 micron 0.006 in. dielectric via openings with corresponding viafill conductive connections gold or silver. The development of the photoimage onto the emulsion of the screen was deemed to be the most important single step in determining the final print definition of the circuit's design. The main body of this work was concentrated on this approach. The selection of the screens, emulsion system, UV exposure and development processes are also discussed. A capability circuit CQC was produced, consisting of five metal layers with linespaces of 100 microns connected on each side of the ceramic by front to back lasered throughhole connections of 125 microns 0.005 in. and layer interconnections through 150 micron 0.006 in. dielectric vias. This capability circuit is classed as an Electronic Component of Assessed Quality by Capability Approval in accordance with BS 63200.

Journal

Microelectronics International – Emerald Publishing

Published: Jan 1, 1994

There are no references for this article.