Development of a Costeffective and Flexible Bumping Method for Flipchip Interconnections

Development of a Costeffective and Flexible Bumping Method for Flipchip Interconnections Many bumping techniques for flipchip interconnections have been developed based on sputtering and electrolytic plating processes. In order to allow bumping on single chips, a new approach is adopted. Suitable metallisation layers are obtained by chemical plating techniques bump formation is achieved by wire bonding of lead base wires or reflow melting of atomised spherical powders solder balls. Flipchip modules on silicon substrate are created after reflow soldering in vacuum or in vapour phase. The quality and reliability of the interconnections are characterised by scanning electron microscopy, shear testing, microhardness measurement, nondestructive testing, temperature and power cycling. It is found that high strength, high quality flipchip interconnections can be achieved. The present method is also economically competitive in comparison with sputtering techniques for the formation of metallisation layers. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Microelectronics International Emerald Publishing

Development of a Costeffective and Flexible Bumping Method for Flipchip Interconnections

Microelectronics International, Volume 9 (3): 7 – Mar 1, 1992

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Publisher
Emerald Publishing
Copyright
Copyright © Emerald Group Publishing Limited
ISSN
1356-5362
DOI
10.1108/eb044478
Publisher site
See Article on Publisher Site

Abstract

Many bumping techniques for flipchip interconnections have been developed based on sputtering and electrolytic plating processes. In order to allow bumping on single chips, a new approach is adopted. Suitable metallisation layers are obtained by chemical plating techniques bump formation is achieved by wire bonding of lead base wires or reflow melting of atomised spherical powders solder balls. Flipchip modules on silicon substrate are created after reflow soldering in vacuum or in vapour phase. The quality and reliability of the interconnections are characterised by scanning electron microscopy, shear testing, microhardness measurement, nondestructive testing, temperature and power cycling. It is found that high strength, high quality flipchip interconnections can be achieved. The present method is also economically competitive in comparison with sputtering techniques for the formation of metallisation layers.

Journal

Microelectronics InternationalEmerald Publishing

Published: Mar 1, 1992

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