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Application of the backgate bias in MOSFET for a switchtype comparator in 4b flash AD converter

Application of the backgate bias in MOSFET for a switchtype comparator in 4b flash AD converter Purpose The purpose of this paper is to present the design and optimization of a comparator with two transistors.Designmethodologyapproach The effect of backgate bias in MOSFET is analyzed and applied to a comparator circuit in a flashtype AD converter ADC. The 4bit flash ADC is simply structured by change of comparator block based on CMOS latch with pMOSFET switch. The backgate bias on MOSFET changes the threshold voltage and provides for a CMOS inverter to shift the voltage transfer characteristics. In the new type comparator, the variation of turnon voltage is controlled within 0.1V in 4bit ADC. The fabrication is done in a 0.35m singlepoly fourmetal process.Findings Layout simulation shows that INL is within 0.3LSB and SNDR is 25.4dB at input frequency of 20KHz and sampling rate of 4MSs. The 0.260.43mm 2ADC dissipates 1.2mW at supply voltage of 3.3V.Originalityvalue A comparator which uses the effect of the backgate bias on MOSFET is applied to a flash ADC. The paper is of value in showing how the circuit of this comparator is quite simple compared with a conventional comparator based on a CMOS latch, which is adaptable for a lowpower analog circuit in future. The experimental output of the 4bit flash ADC shows a good agreement with a simulation. Power consumption 1.2mW, INL 0.2LSB, and SNDR 25dB are obtained in the simulation study. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Microelectronics International Emerald Publishing

Application of the backgate bias in MOSFET for a switchtype comparator in 4b flash AD converter

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References (6)

Publisher
Emerald Publishing
Copyright
Copyright © Emerald Group Publishing Limited
ISSN
1356-5362
DOI
10.1108/13565360810889575
Publisher site
See Article on Publisher Site

Abstract

Purpose The purpose of this paper is to present the design and optimization of a comparator with two transistors.Designmethodologyapproach The effect of backgate bias in MOSFET is analyzed and applied to a comparator circuit in a flashtype AD converter ADC. The 4bit flash ADC is simply structured by change of comparator block based on CMOS latch with pMOSFET switch. The backgate bias on MOSFET changes the threshold voltage and provides for a CMOS inverter to shift the voltage transfer characteristics. In the new type comparator, the variation of turnon voltage is controlled within 0.1V in 4bit ADC. The fabrication is done in a 0.35m singlepoly fourmetal process.Findings Layout simulation shows that INL is within 0.3LSB and SNDR is 25.4dB at input frequency of 20KHz and sampling rate of 4MSs. The 0.260.43mm 2ADC dissipates 1.2mW at supply voltage of 3.3V.Originalityvalue A comparator which uses the effect of the backgate bias on MOSFET is applied to a flash ADC. The paper is of value in showing how the circuit of this comparator is quite simple compared with a conventional comparator based on a CMOS latch, which is adaptable for a lowpower analog circuit in future. The experimental output of the 4bit flash ADC shows a good agreement with a simulation. Power consumption 1.2mW, INL 0.2LSB, and SNDR 25dB are obtained in the simulation study.

Journal

Microelectronics International – Emerald Publishing

Published: Jul 25, 2008

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