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A new fine‐grained matte pure tin for semiconductor lead‐frame applications

A new fine‐grained matte pure tin for semiconductor lead‐frame applications Purpose – To present a new tin plating process which provides deposits having a fine‐grained structure and stable crystal orientation with a combination of properties which are well suited for use as a lead‐free finish on semiconductor lead‐frames. Design/methodology/approach – The new process was designed to produce tin coatings with a deposit grain size ca 20 per cent that of a traditional matte pure tin finish to ensure that the deposit retains good solderability after steam ageing. Findings – The enhanced solderability from the finer‐grained deposit has been demonstrated and other functionally important deposit properties have been confirmed. A stable single crystal orientation ⟨220⟩ indicates low whiskering propensity and measurements have confirmed the excellent whisker performance, even without specific whisker‐preventing countermeasures. The deposit has high ductility. Analytical methods are available for all key components to ensure optimum process control. The process has been tested in a continuous production environment for over 12 months with excellent results. Originality/value – The novel process described in the paper provides tin deposits having a unique combination of properties and with production‐proven capability to be an ideal lead‐free solution as a solderable finish for electronic components. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Circuit World Emerald Publishing

A new fine‐grained matte pure tin for semiconductor lead‐frame applications

Circuit World , Volume 32 (1): 8 – Jan 1, 2006

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Publisher
Emerald Publishing
Copyright
Copyright © 2006 Emerald Group Publishing Limited. All rights reserved.
ISSN
0305-6120
DOI
10.1108/03056120610616526
Publisher site
See Article on Publisher Site

Abstract

Purpose – To present a new tin plating process which provides deposits having a fine‐grained structure and stable crystal orientation with a combination of properties which are well suited for use as a lead‐free finish on semiconductor lead‐frames. Design/methodology/approach – The new process was designed to produce tin coatings with a deposit grain size ca 20 per cent that of a traditional matte pure tin finish to ensure that the deposit retains good solderability after steam ageing. Findings – The enhanced solderability from the finer‐grained deposit has been demonstrated and other functionally important deposit properties have been confirmed. A stable single crystal orientation ⟨220⟩ indicates low whiskering propensity and measurements have confirmed the excellent whisker performance, even without specific whisker‐preventing countermeasures. The deposit has high ductility. Analytical methods are available for all key components to ensure optimum process control. The process has been tested in a continuous production environment for over 12 months with excellent results. Originality/value – The novel process described in the paper provides tin deposits having a unique combination of properties and with production‐proven capability to be an ideal lead‐free solution as a solderable finish for electronic components.

Journal

Circuit WorldEmerald Publishing

Published: Jan 1, 2006

Keywords: Soldering; Semiconductors; Coating processes; Ductility

References