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Minor-embedding in adiabatic quantum computation: II. Minor-universal graph design

Minor-embedding in adiabatic quantum computation: II. Minor-universal graph design In Choi (Quantum Inf Process, 7:193–209, 2008), we introduced the notion of minor-embedding in adiabatic quantum optimization. A minor-embedding of a graph G in a quantum hardware graph U is a subgraph of U such that G can be obtained from it by contracting edges. In this paper, we describe the intertwined adiabatic quantum architecture design problem, which is to construct a hardware graph U that satisfies all known physical constraints and, at the same time, permits an efficient minor-embedding algorithm. We illustrate an optimal complete-graph-minor hardware graph. Given a family $${\mathcal{F}}$$ of graphs, a (host) graph U is called $${\mathcal{F}}$$ -minor-universal if for each graph G in $${\mathcal{F}, U}$$ contains a minor-embedding of G. The problem for designing a $${{\mathcal{F}}}$$ -minor-universal hardware graph U sparse in which $${{\mathcal{F}}}$$ consists of a family of sparse graphs (e.g., bounded degree graphs) is open. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Quantum Information Processing Springer Journals

Minor-embedding in adiabatic quantum computation: II. Minor-universal graph design

Quantum Information Processing , Volume 10 (3) – Oct 13, 2010

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References (25)

Publisher
Springer Journals
Copyright
Copyright © 2010 by Springer Science+Business Media, LLC
Subject
Physics; Quantum Information Technology, Spintronics; Quantum Computing; Data Structures, Cryptology and Information Theory; Quantum Physics; Mathematical Physics
ISSN
1570-0755
eISSN
1573-1332
DOI
10.1007/s11128-010-0200-3
Publisher site
See Article on Publisher Site

Abstract

In Choi (Quantum Inf Process, 7:193–209, 2008), we introduced the notion of minor-embedding in adiabatic quantum optimization. A minor-embedding of a graph G in a quantum hardware graph U is a subgraph of U such that G can be obtained from it by contracting edges. In this paper, we describe the intertwined adiabatic quantum architecture design problem, which is to construct a hardware graph U that satisfies all known physical constraints and, at the same time, permits an efficient minor-embedding algorithm. We illustrate an optimal complete-graph-minor hardware graph. Given a family $${\mathcal{F}}$$ of graphs, a (host) graph U is called $${\mathcal{F}}$$ -minor-universal if for each graph G in $${\mathcal{F}, U}$$ contains a minor-embedding of G. The problem for designing a $${{\mathcal{F}}}$$ -minor-universal hardware graph U sparse in which $${{\mathcal{F}}}$$ consists of a family of sparse graphs (e.g., bounded degree graphs) is open.

Journal

Quantum Information ProcessingSpringer Journals

Published: Oct 13, 2010

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