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Extreme Software Scaling

Extreme Software Scaling Extreme Software ScalingChip multiprocessors have introduced a new dimension in scaling for application developers, operating system designers, and deployment specialists. RICHARD MCDOUGALL, SUN MICROSYSTEMSThe advent of SMP (symmetric multiprocessing) added a new degree of scalability to computer systems. Rather than deriving additional performance from an incrementally faster microprocessor, an SMP system leverages multiple processors to obtain large gains in total system performance. Parallelism in software allows multiple jobs to execute concurrently on the system, increasing system throughput accordingly. Given sufficient software parallelism, these systems have proved to scale to several hundred processors. More recently, a similar phenomenon is occurring at the chip level. Rather than pursue diminishing returns by increasing individual processor performance, manufacturers are producing chips with multiple processor cores on a single die. (See “The Future of Microprocessors,” by Kunle Olukotun and Lance Hammond, in this issue.) For example, the AMD Opteron1 processor now uses two entire processor cores per die, providing almost double the performance of a single core chip. The Sun Niagara2 processor, shown in figure 1, uses eight cores per die, where each core is further multiplexed with four hardware threads each. These new CMPs (chip multiprocessors) are bringing what was once a http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Queue Association for Computing Machinery

Extreme Software Scaling

Queue , Volume 3 (7) – Sep 1, 2005

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References (9)

Publisher
Association for Computing Machinery
Copyright
Copyright © 2005 by ACM Inc.
ISSN
1542-7730
DOI
10.1145/1095408.1095419
Publisher site
See Article on Publisher Site

Abstract

Extreme Software ScalingChip multiprocessors have introduced a new dimension in scaling for application developers, operating system designers, and deployment specialists. RICHARD MCDOUGALL, SUN MICROSYSTEMSThe advent of SMP (symmetric multiprocessing) added a new degree of scalability to computer systems. Rather than deriving additional performance from an incrementally faster microprocessor, an SMP system leverages multiple processors to obtain large gains in total system performance. Parallelism in software allows multiple jobs to execute concurrently on the system, increasing system throughput accordingly. Given sufficient software parallelism, these systems have proved to scale to several hundred processors. More recently, a similar phenomenon is occurring at the chip level. Rather than pursue diminishing returns by increasing individual processor performance, manufacturers are producing chips with multiple processor cores on a single die. (See “The Future of Microprocessors,” by Kunle Olukotun and Lance Hammond, in this issue.) For example, the AMD Opteron1 processor now uses two entire processor cores per die, providing almost double the performance of a single core chip. The Sun Niagara2 processor, shown in figure 1, uses eight cores per die, where each core is further multiplexed with four hardware threads each. These new CMPs (chip multiprocessors) are bringing what was once a

Journal

QueueAssociation for Computing Machinery

Published: Sep 1, 2005

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