Access the full text.
Sign up today, get DeepDyve free for 14 days.
Loading next page...
/lp/association-for-computing-machinery/an-anomaly-in-an-interpreter-using-gcc-source-code-level-register-I92AqnhfOO
References (3)
-
James Bell (1973)
Threaded codeCommun. ACM, 16
-
(2005)
A New Approach to Bytecode Translation for Accelerating Java Interpreters, -
Fuh-Gwo Chen, Ting-Wei Hou (2006)
Instruction-coated translation: an approach to restructure directly threaded interpreters with low cohesionACM SIGPLAN Notices, 41
- Publisher
- Association for Computing Machinery
- Copyright
- Copyright © 2007 by ACM Inc.
- ISSN
- 0362-1340
- DOI
- 10.1145/1288258.1288260
- Publisher site
- See Article on Publisher Site
Abstract
An anomaly of unexpected performance in an interpreter whose frequently accessed variables are manually assigned to hard registers by GCC source-code-level register allocation is presented. A hard-registered virtual program counter and stack pointer as well as a byte-code translation are experimented on both register-rich PowerPC and register-limited Intel x86. According to the study of the anomaly, a hard register should not be assigned singly to a variable in an interpreter due to higher register pressure.
Journal
ACM SIGPLAN Notices – Association for Computing Machinery
Published: Apr 1, 2007