TY - JOUR
AU - Okhonin, Serguei
AB - We introduce a new cell architecture for Dynamic Random Access Memory (DRAM) and embedded DRAM applications. By exploiting the Floating Body characteristics of partially depleted silicon on insulator (SOI) transistors, a capacitor-less DRAM cell structure can store and amplify the stored signal by using only a single transistor. Such a DRAM cell has a footprint two times smaller than that of standard DRAM cells and can be integrated in any CMOS process.
TI - Highly manufacturable capacitor-less 1T-DRAM concept
JF - Proceedings of SPIE
DO - 10.1117/12.475684
DA - 2002-07-11
UR - https://www.deepdyve.com/lp/spie/highly-manufacturable-capacitor-less-1t-dram-concept-zD9O43DC2n
SP - 489
EP - 502
VL - 4692
IS - 1
DP - DeepDyve
ER -