TY - JOUR
AU - Liu, Jianzheng
AB - With the development of high voltage direct current (HVDC) power transmission system, it is imperative to develop a practical current limiting device which can effectively protect the converter from the influence of fault current. Based on the topology of current limiter proposed in previous papers, considering the requirements of practical application conditions, an optimized topology is proposed, which consists of snubber circuit and arrester, both in simulation and experiment. In addition, the RC buffering circuit is added and the parameters are optimized to reduce the voltage impulse that the IGBT of fault current limiter would else bear. Simulation and experiment are carried out in DC system. Both simulation and experiment results can prove the effectiveness of the optimized current limiter circuit.
TI - Simulation and experiment of a new DC fault current limiter topology
JF - Journal of Physics: Conference Series
DO - 10.1088/1742-6596/1449/1/012094
DA - 2020-01-01
UR - https://www.deepdyve.com/lp/iop-publishing/simulation-and-experiment-of-a-new-dc-fault-current-limiter-topology-vhG61Zlhrs
SP - 012094
VL - 1449
IS - 1
DP - DeepDyve
ER -