TY - JOUR
AU1 - Byun, Chun-Won
AU2 - Kim, Yeo-Myeong
AU3 - Yu, Byung-Chang
AU4 - Yang, Jong-Heon
AU5 - Hwang, Chi-Sun
AU6 - Kim, So-Jung
AU7 - Lee, Seung-Hyuck
AU8 - Lee, Seung-Woo
AU9 - Cho, Nam Sung
AU1 - Lee, Jeong-IK
AU1 - Yoon, Sung-Min
AB - We propose the design concept for dramatically reducing the power consumption of integrated circuit using TFTs, which is named as Read‐out Modulation (RoM). In the RoM scheme, the read‐out voltages applied to the charge‐trap memory TFTs are intentionally modulated to replace the clocks of shift registers to minimize the clocking power consumption. The test circuit is fabricated and the proposed RoM is successfully verified with the frequency characteristics.
TI - 42‐1: A Promising Strategy of Low‐Power Circuit Design for Integrated Display Driver Using Charge‐Trap Memory and Oxide Thin Film Transistors
JF - Sid Symposium Digest of Technical Papers
DO - 10.1002/sdtp.12455
DA - 2018-01-01
UR - https://www.deepdyve.com/lp/wiley/42-1-a-promising-strategy-of-low-power-circuit-design-for-integrated-fenXcdSdy2
SP - 528
EP - 531
VL - 49
IS - 1
DP - DeepDyve
ER -