TY - JOUR
AU - Abuhabaya, Abdullah
AB - Abstract The present article reports on the design, modeling and parametric optimization of a thermoelectric cooling system for electronics applications. An analytical model based on energy equilibrium is developed for cooling a microprocessor using a thermoelectric module with an air-cooled finned heat sink. The proposed analytical model is validated by experimental measurements and by comparison with detailed 3D numerical simulations. Estimation of effective material properties of the thermoelectric module using manufacturer-reported performance characteristics is found to reduce the uncertainty in the calculation of module input power as compared to experimental measurements. A parametric optimization of the thermoelectric module and heat sink is carried out to maximize the coefficient of performance (COP) and achieve the required cooling capacity of the microprocessor. The effectiveness of the proposed methodology is demonstrated for cooling current high power microprocessors. At a constant input current, the cooling capacity and COP of the thermoelectric cooling system increase with increasing thermoelectric module geometric ratio. Furthermore, at a constant geometric ratio, the cooling power increases with increasing input current to reach a maximum value and then decreases. The present study highlights the importance of designing and fabricating high-performance thermoelectric cooler modules with optimum parameters for cooling specific electronic components. The results indicate that the cooling capacity can be increased by ~70% using thermoelectric modules with optimized parameters as compared to using non-optimized commercially available thermoelectric modules. 1. INTRODUCTION The large amount of heat generated during operation from current electronic devices poses significant challenges for efficient thermal management to ensure safe and reliable operation. These challenges relate to the need to maintain the electronic device junction temperature below the maximum allowable temperature at the processor die, known as the junction temperature. In the area of microprocessor cooling, thermal design power (TDP) represents the average power the processor dissipates when operating at base frequency with all cores active. The values of TDP continue to increase with the development of new generations of devices. For example, the TDP value for the recent Intel i9 X series processors is as high as 165 W, with a maximum allowed junction temperature of 94°C [14]. The primary challenge with using conventional bulk cooling systems is the limited available space in electronic packages. The high effective heat dissipation requirements are difficult to meet using conventional air or water passive cooling technologies; therefore, active cooling methods should be applied. Thermoelectric coolers (TECs) associated with hot side air or liquid cooling solutions have shown promise for electronics cooling. The advantages of TECs include their small size, high reliability and low noise. The use of TECs in military, aerospace, instruments and industrial products has been supported by the commercial availability of TECs in small sizes [27, 29]. Thermoelectric modules consist of p-type and n-type semiconductor pellets wired electrically in series and thermally in parallel to function as a solid-state energy converter. A thermoelectric air-cooling module comprised of a TEC and an air-cooling heat sink is shown in Figure 1. Whenever direct current passes in the appropriate direction through the circuit, a thermoelectric cooling effect is generated; as a result, one TEC face is cooled and the opposite face is simultaneously heated. In electronics cooling applications, a TEC is used as a solid-state energy converter for removing heat from the high-temperature surface to the low-temperature environment. The TEC pumps heat away from the device to maintain the electronic device junction temperature below the safe design threshold. Figure 1 Open in new tabDownload slide Schematic of a thermoelectric air-cooling module comprised of a TEC and an air-cooling heat sink. Figure 1 Open in new tabDownload slide Schematic of a thermoelectric air-cooling module comprised of a TEC and an air-cooling heat sink. In recent years, researchers have used TECs for electronics cooling and have developed many approaches for thermoelectric cooling modules. Some studies have investigated the effective operating range of TEC modules using an air-cooling heat sink and water-cooling device for different values of heat load and input current [7, 13]. Using a square 40 × 40 mm2 TEC module, higher performance was reported for heat load values below 50.5 W and 57 W for an air-cooled heat sink and water-cooling device, respectively [7, 13]. Chein and Huang [9] theoretically investigated the heat sink thermal resistance requirement for high TEC performance using a commercially available square 55 × 55 mm2 TEC module. The maximum obtained cooling capacity and chip junction temperature were reported as 207 W and 88°C, respectively. The performance of the TEC was shown to be restricted by the TEC cold side temperature and heat sink thermal resistances. Studies on improving the performance of TECs by decreasing the thermal resistance of the heat sink have proposed the use of novel cooling technologies; these include adopting heat sinks that are cooled using microchannels [8, 9, 22], phase change materials [12, 30], heat pipes [25, 33], water jet [15] and nanofluids [2, 26, 28]. Many recent studies have also explored the potential capabilities of using thermoelectric generators (TEGs) in electronics and micro-electromechanical systems. These studies include the use of TEGs for generating electricity in micro-power generation systems [3, 23, 39] and self-cooling systems of computer chips [6, 32]. Novel techniques have been proposed to extract maximum heat from the hot combustion products of thermoelectric power generators [3]. In the field of electronics cooling, Lee et al. [32] proposed placing TEGs on the cold chip areas to generate electrical power from the wasted heat from the CPU that can be used to power TECs located on the hotspot areas to maintain local temperatures to equal or below a certain temperature threshold [6]. Cai et al. [6] showed that increasing the figure-of-merit, ZT, of the TEG from 0.5 to 3.0 resulted in decreasing the chip temperature from 92.44 to 74.55°C. The results of a 3D numerical study for performance optimization of cascaded and non-cascaded TEGs and TECs used in developing a self-cooling system for cooling chip hotspots showed that the system can successfully cool down the hotspot to an acceptable temperature [31]. The focus of the present study is on the use of TECs in electronics cooling. TEC performance depends on several parameters, which can be classified as thermoelectric module design parameters, cooling system thermal design parameters and cooling system working condition parameters. Thermoelectric module design parameters include the number of thermocouples (thermoelectric elements) and the thermoelectric element length to cross-sectional area ratio. The cooling system thermal design parameters include the geometry of the heat sink, available heat transfer area, heat transfer coefficient and thermal and electrical contact resistance. In addition, the cooling system working condition parameters include electric current input, heat sink coolant type and mass flow rate. Enhancement of TEC system performance can be obtained by optimizing each category of these parameters for a specific application. Proper design of a TEC system involves identifying the optimal balance between system cooling capacity and cooling coefficient of performance (COP). Previous research work on TECs has focused on the effect of different parameters on thermoelectric system performance [37]. Luo et al. [10] presented a recent parametric study of a thermoelectric module used for power generation and cooling. A theoretical model was used to study the influences of height, cross-sectional area, number of couples, ceramic plate and heat loss on the generator and cooler performance [10]. The performance optimization of TEC systems has been discussed in many studies [1, 16, 17, 38], and a recent review was reported in [36]. In addition to the exploration of high-performance thermoelectric (TE) materials, structure-based optimization approaches are also reported to enhance the performance of TE modules. A variety of system optimization methods have been adopted by Lee [20]. In order to reduce the number of optimum design parameters, a dimensionless analytical method has been adopted by several authors. Attar and Lee [4] presented a method for optimizing each parameter to maximize the cooling capacity of the TEC system as well as COP. By considering both the first and second laws of thermodynamics, Wang et al. [34] introduced a dimensionless entropy generation number based on thermal conductance to evaluate the external irreversibility in the thermoelectric cooling system. Lee [20] adopted the use of a thermal conduction ratio, convection conduction ratio and load resistance ratio as new dimensionless groups to represent important parameters of the thermoelectric devices. Zhu et al. [24] conducted a theoretical study focused on the optimal heat exchanger configuration of a TEC system. The analytical results indicated that the highest COP, highest heat flux pumping capability of the TEC and lowest cold side temperature can be achieved by selecting an optimal heat transfer area allocation ratio. Elarusi et al. [11] investigated the optimum design of a TEC with heat sinks based on a modification of the dimensional technique developed by Lee [20]. The analysis showed that an optimal design of a TEC can be determined if two fluid temperatures at the heat sinks are known. Optimization of the TEC cooling power and COP were achieved by optimizing the dimensionless current and thermal conductance. In designing and developing a TEC for electronic cooling applications, its purpose is to maintain the electronic device junction temperature below a safe temperature by rejecting the heat from the electronic device. Due to the fact that the parameters for commercially available TEC modules vary based on the manufacturer, the key design task is to find the optimum thermoelectric element geometry and structure parameters and the relevant design constraints. Despite the numerous parametric analyses and optimizations of TEC systems discussed above, efficient design tools are needed that can assist developers to select and design suitable TECs for cooling electronic components, reducing the need for costly and time-consuming experimental evaluation tests. The goal of this study is to develop an analytical model for the design and optimization of TECs for microprocessor cooling. This study’s major contribution is a simple and robust design tool that can be easily used by electronics developers to design an effective TEC system for current high power density microprocessors. In the present study, optimization techniques are employed for optimizing the thermoelectric module design parameters and heat sink cooling system. A case study involving the cooling of an Intel i9 microprocessor is utilized to demonstrate the capability of the proposed design and analytical approach. Commercial TEC modules are investigated and their performance is predicted by estimating the effective material properties from the performance curves typically provided by the manufacturers. The performance of the TEC module depends on a set of parameters such as the electrical current, the thermal conductivity of the semiconductors, the number thermoelectric elements and its geometric ratio. Likewise, the heat sink performance depends on the number and thickness of the fins as well as the fin spacing, which influence the heat transfer rate. The thermoelectric parameters are studied simultaneously with the heat sink parameters in which the optimum cooling power is analyzed along with the heat sink dimensions, electrical current and leg length of the thermoelectric module. The proposed analytical models are validated with detailed 3D numerical simulations. In addition, the predictions from the theoretical model are compared with the experimental results. The optimal design using the developed analytical model with the effective material properties obtained by Weera et al. [35] is shown to be simple and robust. The present study highlights the importance of the optimal design and fabrication of high-performance TEC modules specifically for cooling electronic components. The use of commercially available TE modules may limit the performance of these electronic devices. 2. DESIGN AND MODELING The thermoelectric system used to cool the microprocessor in this study consists of a thermoelectric module placed between a microprocessor and a heat sink, as shown above in Figure 1. The microprocessor considered in the present study is the Intel® Core™ i9-9820X X-series Processor with a total power dissipation of 165 W, junction temperature of 94°C and a surface area 50 × 50 mm2 [14]. Intel recommends the use of a liquid cooling high-performance thermal solution attached to the entire surface area of the microprocessor. In the present design, the surface area of the TEC is considered equal to the microprocessor area, as shown in Figure 1. This design represents the minimum solution as constrained by space limitations; increasing the TEC module area results in more heat dissipation from the microprocessor. The microprocessor generates the heat, Qc, at the bottom of the microprocessor layer, and the heat subsequently transfers to the TEC module by conduction. The TEC module then absorbs the Qc at the cold junction and rejects the heat at the hot junction via thermoelectric cooling effects. Finally, the heat rejected from the TEC module, Qh, dissipates into the surroundings by convection. Different modeling approaches for TEC have been reported in the literature. Three-dimensional modeling involves solving governing nonlinear partial differential equations to capture the temperature distribution both along and across the thermoelectric element; however, this requires significantly more computational effort. In contrast, energy equilibrium models (EEMs) are simple and, when they are validated, can be used as an analytical design tool for thermoelectric cooling applications. In the present study, an analytical model based on energy equilibrium is validated by comparison with the results obtained from a 3D numerical model and experimental measurements. 2.1. TEC energy equilibrium model An EEM is developed based on governing equations that describe the thermoelectric effects to evaluate the performance of TEC modules. An EEM is a compact model that can be applied to simplify the design process of the TEC. The calculations of heat flux at the cold and hot sides of the TEC take into account the Seebeck effect, Joule heating and heat conduction. They are written as follows [21]: $$\begin{equation} {Q}_c=n\left[\alpha{T}_cI-\frac{1}{2}{I}^2R-K\left({T}_h-{T}_c\right)\right] \end{equation}$$(1) $$\begin{align} {Q}_h=n\left[\alpha{T}_hI+\frac{1}{2}{I}^2R-K\left({T}_h-{T}_c\right)\right] \end{align}$$(2) where |${Q}_c$| is the cooling capacity at cold side,|${Q}_h$| is the heat rejection rate, |$n$| is the number of thermoelectric elements, |$\alpha$| is the Seebeck coefficient,|${T}_c$| is the cold junction temperature,|${T}_h$| is the hot junction temperature, |$I$| is current, |$R$| is the electrical resistance of the thermoelectric element and |$K$| is the thermal conductance of the thermoelectric element. The values of R and K are calculated using the following: $$\begin{equation} R=\frac{\rho{L}_e}{A_e} \end{equation}$$(3) $$\begin{equation} K=\frac{k{A}_e}{L_e} \end{equation}$$(4) where |$\rho$| is the electrical resistivity (Ω cm), k is the thermal conductivity,|${A}_e$| is the cross-sectional area of the thermoelectric element and |${L}_e$| is the length of thermoelectric element. The performance of thermoelectric devices is measured by the figure of merit, Z, with units of 1/K, written as follows: $$\begin{equation} Z=\frac{\alpha^2}{\rho k}=\frac{\alpha^2\sigma }{k} \end{equation}$$(5) where |$\sigma$| is electrical conductivity |${\big(\varOmega cm\big)}^{-1}$|⁠. The dimensionless figure of merit is defined by ZT, where T is the absolute temperature; it is practically limited to values of ZT ≈ 1. Higher values of ZT indicate greater energy conversion efficiency of the TEC material. The quantity of |${\alpha}^2$|σ is defined as the power factor and is a function of the Seebeck coefficient, |$\alpha$|⁠, and the electrical conductivity, |$\sigma$|⁠. Therefore, it is preferable to increase the electrical conductivity and minimize the thermal conductivity. Improving a material’s ZT is challenging due to the well-known interdependence among these physical properties [29]. Assuming that the n- and p-type thermoelectric elements have the same leg length and cross-sectional area [21], and considering the heat transfer rate from the heat sink by convection and conduction in the processor, the governing equations are written as follows: $$\begin{equation} {Q}_h=\eta \mathrm{hA}\left({\mathrm{T}}_h-{T}_{\infty}\right) \end{equation}$$(6) $$\begin{equation} {Q}_h=n\left(\alpha I\ {T}_h+0.5\ {I}^2\frac{\rho }{G_e}-{G}_e\ k\left({T}_h-{T}_c\right)\right) \end{equation}$$(7) $$\begin{equation} {Q}_c=n\left(\alpha I\ {T}_c-0.5\ {I}^2\frac{\rho }{G_e}-{G}_e\ k\left({T}_h-{T}_c\right)\right) \end{equation}$$(8) $$\begin{equation} {Q}_c=\frac{k_p{A}_p}{t_p}\left({T}_p-{T}_c\right) \end{equation}$$(9) where T∞ is the average air temperature between the air inlet and outlet, |${G}_e$| is the geometric ratio of the thermoelectric element, which is equal to |$\frac{A_e}{L_e}$|⁠,|${A}_e$| is the cross-sectional area of the thermoelectric element, |${L}_e$| is the length of the thermoelectric element, |${k}_p$|is the thermal conductivity of the processor, |${A}_p$| is the heat transfer area of the processor, |${t}_p$| is the processor thickness and |${T}_p$| is the processor temperature. The input power to the TEC module is given by the following: $$\begin{equation} {P}_{in}={Q}_h-{Q}_C. \end{equation}$$(10-a) Alternatively, from the perspective of the power supply, assuming no losses in the circuit, the power consumption of the TEC can be calculated using the voltage, V, and current, I, as follows: $$\begin{equation} {P}_{in}= VI. \end{equation}$$(10-b) The COP is given by the following: $$\begin{equation} \mathrm{COP}=\frac{Q_c}{P_{in}}. \end{equation}$$(11) Figure 2 Open in new tabDownload slide Cross-sectional area and length of a thermoelectric element. Figure 2 Open in new tabDownload slide Cross-sectional area and length of a thermoelectric element. Figure 3 Open in new tabDownload slide Detailed schematic of a single couple model and module design. Figure 3 Open in new tabDownload slide Detailed schematic of a single couple model and module design. Table 1 Module specifications used in the present study. Geometry . Value . Units . p-type element  Thermal cross-section area (E-D × E-W) 1 mm × 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm n-type element  Thermal cross-section area (E-D × E-W) 1 mm * 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm Copper conductor  Electrical cross-section area (Cu-W × Cu-t) 0.1 mm × 1 mm mm2  Electrical length (Cu-L) 3 mm  Thermal conductivity 400 W/m K  Electrical resistivity 1.7 × 10−5 Ω.mm Ceramic insulation  Thermal cross-section area (Cr W × Cr L) 50 mm × 50 mm mm2  Thickness (Cr-t) 0.1 mm  Thermal conductivity 30 W/m K Geometry . Value . Units . p-type element  Thermal cross-section area (E-D × E-W) 1 mm × 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm n-type element  Thermal cross-section area (E-D × E-W) 1 mm * 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm Copper conductor  Electrical cross-section area (Cu-W × Cu-t) 0.1 mm × 1 mm mm2  Electrical length (Cu-L) 3 mm  Thermal conductivity 400 W/m K  Electrical resistivity 1.7 × 10−5 Ω.mm Ceramic insulation  Thermal cross-section area (Cr W × Cr L) 50 mm × 50 mm mm2  Thickness (Cr-t) 0.1 mm  Thermal conductivity 30 W/m K Open in new tab Table 1 Module specifications used in the present study. Geometry . Value . Units . p-type element  Thermal cross-section area (E-D × E-W) 1 mm × 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm n-type element  Thermal cross-section area (E-D × E-W) 1 mm * 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm Copper conductor  Electrical cross-section area (Cu-W × Cu-t) 0.1 mm × 1 mm mm2  Electrical length (Cu-L) 3 mm  Thermal conductivity 400 W/m K  Electrical resistivity 1.7 × 10−5 Ω.mm Ceramic insulation  Thermal cross-section area (Cr W × Cr L) 50 mm × 50 mm mm2  Thickness (Cr-t) 0.1 mm  Thermal conductivity 30 W/m K Geometry . Value . Units . p-type element  Thermal cross-section area (E-D × E-W) 1 mm × 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm n-type element  Thermal cross-section area (E-D × E-W) 1 mm * 1 mm mm2  Length (E-L) 0.7 mm mm  Seebeck coefficient (⁠|$\alpha$|⁠) 209.88 μV/K  Thermal conductivity (k) 0.011 W/m K  Electrical resistivity (ρ ( 6.27 × 10−3 Ω.mm Copper conductor  Electrical cross-section area (Cu-W × Cu-t) 0.1 mm × 1 mm mm2  Electrical length (Cu-L) 3 mm  Thermal conductivity 400 W/m K  Electrical resistivity 1.7 × 10−5 Ω.mm Ceramic insulation  Thermal cross-section area (Cr W × Cr L) 50 mm × 50 mm mm2  Thickness (Cr-t) 0.1 mm  Thermal conductivity 30 W/m K Open in new tab 2.2. TEC effective material properties Solving Equations (7) and (8) requires the determination of properties of the thermoelectric module. The design of a TEC module for cooling applications is usually based on commercially available elements in the market. The manufacturers of thermoelectric modules typically provide the maximum values for parameters such as temperature difference, ΔTmax, the electrical current, Imax, the cooling power, Qmax, and the voltage, Vmax. However, the material properties of the module such as the Seebeck coefficient, α, the electrical resistivity, ρ, and the thermal conductivity, k, are not given. Material property values can be obtained using the effective material equations, where the properties are extracted from the maximum parameters provided by the manufacturers [35], as defined in Equations (12) to (15). The effective figure of merit, Z*, is given by the following [21]: $$\begin{equation} {Z}^{\ast }=\frac{2\Delta{T}_{max}}{{\left({T}_h-\Delta{T}_{max}\right)}^2}. \end{equation}$$(12) The effective Seebeck coefficient, α*, is given by the following: $$\begin{equation} {\alpha}^{\ast }=\frac{2{Q}_{max}}{n\ {I}_{max}\left({T}_h+\Delta{T}_{max}\right)}. \end{equation}$$(13) The effective electrical resistivity, ρ*, is given by the following: $$\begin{equation} {\rho}^{\ast }=\frac{\alpha^{\ast}\left({T}_h+\Delta{T}_{max}\right){A}_e/{L}_e}{I_{max}} \end{equation}$$(14) where Ae is the cross-sectional area of the thermoelectric element and Le is the length of the thermoelectric element, as shown in Figure 2. The effective thermal conductivity, k*, is given by the following: $$\begin{equation} {k}^{\ast }=\frac{\alpha^{\ast 2}\ }{\ {\rho}^{\ast }{Z}^{\ast }}. \end{equation}$$(15) Thus, after determining the values of effective properties (k*, |${\rho}^{\ast },{\alpha}^{\ast }$|⁠) using Equations (12) to (15), they are used to replace their corresponding values (k, ρ|$, \alpha )$| in Equations (7) to (9). Using the effective material properties in the ideal equations to evaluate the performance of thermoelectric modules accounts for a majority of parasitic losses and uncertainties associated with electrical and thermal contact resistances, material degradation and the Thomson effect, which could be observed when the intrinsic material properties are used [35]. Comparing the performance of the TEC module using the effective material properties calculated by Equations (12) to (15) with both commercially provided data and experimental results supports the validity of the developed method as a highly utilizable analytical tool in predicting the performance of commercial thermoelectric modules [35]. 2.3. Couple and module design Geometric models of the TEC couple and module designs and specifications for the theoretical and 3D analysis of the present study are shown in Figure 3 and Table 1, respectively. The dimension values listed in Table 1 are representative values and are varied for the purpose of optimization of the TEC module. The fill factor, F, is the ratio of the area covered by the active thermoelectric material to the plate area. The value of F is determined by the dimensions of the p-type and n-type elements and the copper conductor. The couple leg length and cross-sectional area are varied to achieve for the optimum value of geometric ratio (Ge). The length of the copper conductor varies according to the leg dimensions in order to maintain a constant fill factor of 0.66, which is normally recommended and used in commercial TEC modules [18]. The module surface area is fixed at 50 × 50 mm2 to equal the surface area of the microprocessor implemented in the case study. The number of couples in the module can be easily determined when distributed over this fixed area. Figure 4 Open in new tabDownload slide Schematic of the heat sink and the key design parameters [ 19]. Figure 4 Open in new tabDownload slide Schematic of the heat sink and the key design parameters [ 19]. 2.4. Heat sink design and optimization The heat sink plays an important role in the overall performance of the TEC system. It is placed above the TEC to reject the heat from the TEC’s hot side. A heat sink is a device that absorbs and rejects heat into the surrounding air by increasing the heat transfer surface area with the use of fins or spines. The objective of this section is to optimize the heat sink parameters, |$\eta h\mathrm{A}$|⁠, in Equation (6) to maximize the heat rejection, |${Q}_h$|⁠. Figure 4 depicts the design parameters of the heat sink, where b is the profile length, the base area is |$W\times L$| and the material used is aluminum. The heat sink is designed and optimized following the optimization technique developed by Lee [19]. The heat sink dimensions (width, W, length, L, and profile length, 𝑏) are fixed by the available space associated with the microprocessor. Therefore, the present optimization focuses on optimizing the fin thickness, t, fin spacing, z, and number of fins, n, in order to minimize the thermal resistance, Rt, given by the following [19]: $$\begin{equation} {R}_t=\frac{1}{\eta hA}. \end{equation}$$(16) The overall efficiency, |$\eta$|⁠, is given by the following: $$\begin{equation} \eta =1-n\frac{A_f}{A}\left(1-{\eta}^{\ast}\right) \end{equation}$$(17) where A is the total area and |${A}_f$|is a single-fin area calculated as follows: $$\begin{equation} \mathrm{A}=n\left(2\left(L+t\right)b+ Lz\right) \end{equation}$$(18) $$\begin{equation} {A}_f=2\left(L+t\right)b. \end{equation}$$(19) The single-fin efficiency, |${\eta}^{\ast }$|⁠, is given by the following: $$\begin{equation} {\eta}^{\ast }=\frac{\tanh (mb)}{bm} \end{equation}$$(20) $$\begin{equation} m={\left(\frac{2h}{k_{alu}t}\right)}^{\frac{1}{2}}. \end{equation}$$(21) The heat transfer coefficient, h, is calculated using the following equations: $$\begin{equation} h=\frac{Nu\ {k}_{air}}{D_h} \end{equation}$$(22) $$\begin{equation} Nu=0.023{R_e}^{\frac{4}{5}}{\mathit{\Pr}}^{0.4} \end{equation}$$(23) $$\begin{equation} {R}_e=\frac{U_{air}{D}_h}{\nu } \end{equation}$$(24) $$\begin{equation} {D}_h=\frac{4\ z\ b}{2\left(z+b\right)} \end{equation}$$(25) where Nu is the Nusselt number, kair is the thermal conductivity of air, Dh is the hydraulic diameter, Pr is the Prandtl number, Re is the Reynolds number, Dh is the hydraulic diameter, Uair is the air velocity and |$\nu$| is the kinematic viscosity of air. Equation (23) is applicable to turbulent flow, which is dominant for the range of air flow velocity and heat sink dimensions encountered in the present study. It is important to emphasize that the higher the heat transfer coefficient value, the greater the heat dissipation. Increasing the heat transfer coefficient can be achieved by increasing the air velocity, which correspondingly increases the required fan power. Therefore, the fan power is calculated using the following: $$\begin{equation} {P}_{power}=\varDelta P{V}_t \end{equation}$$(26) where |${V}_t$| is the total volume flow rate and |$\varDelta P$| is the pressure drop across the sink, given by the following: $$\begin{equation} {V}_t={U}_{air}z\ b\left(n-1\right) \end{equation}$$(27) $$\begin{equation} \varDelta P=f\frac{L}{D_h}\frac{\rho_{air}{U}_{air}^2}{2}. \end{equation}$$(28) The friction factor is a function of Reynolds number: $$\begin{equation} f=0.316{R_e}^{\frac{-1}{4}} \end{equation}$$(29) Equations (8) to (26) relating to the heat sink design are solved as a function of the fin thickness, t, with iterations to find the optimal design, which maximizes the heat transfer rate. The aluminum and air properties used in the equations are listed in Table 2. The fin base area (L × W) is equal to that of the microprocessor dimensions (50 × 50 mm2). Figure 5 shows that the heat dissipation rate first increases with increasing fin thickness. However, the increase in fin thickness reduces the spacing between the fins and the number of fins resulting in a decreasing in the surface area for convective heat transfer. At the optimum fin thickness of 0.76 mm, the maximum heat rejected by the heat sink is 205.52 W, which exceeds the power dissipated from the microprocessor. The heat sink design parameters at the optimum condition are listed in Table 3. Table 2 Aluminum and air properties. Property . Symbol . Unit . Air . Aluminum . Thermal conductivity k W/m K 26.3 × 10−3 177 Density ρ kg/m3 |$1.16$| |$2700$| Prandtl number Pr 0.707 Kinematic viscosity ν m2/s 15.89 × 10−6 Air velocity Uair m/s 17.38 Property . Symbol . Unit . Air . Aluminum . Thermal conductivity k W/m K 26.3 × 10−3 177 Density ρ kg/m3 |$1.16$| |$2700$| Prandtl number Pr 0.707 Kinematic viscosity ν m2/s 15.89 × 10−6 Air velocity Uair m/s 17.38 Open in new tab Table 2 Aluminum and air properties. Property . Symbol . Unit . Air . Aluminum . Thermal conductivity k W/m K 26.3 × 10−3 177 Density ρ kg/m3 |$1.16$| |$2700$| Prandtl number Pr 0.707 Kinematic viscosity ν m2/s 15.89 × 10−6 Air velocity Uair m/s 17.38 Property . Symbol . Unit . Air . Aluminum . Thermal conductivity k W/m K 26.3 × 10−3 177 Density ρ kg/m3 |$1.16$| |$2700$| Prandtl number Pr 0.707 Kinematic viscosity ν m2/s 15.89 × 10−6 Air velocity Uair m/s 17.38 Open in new tab Figure 5 Open in new tabDownload slide Total heat transfer rate from the heat sink vs. fin thickness (base area 50 × 50 mm2, base temperature 85°C). Figure 5 Open in new tabDownload slide Total heat transfer rate from the heat sink vs. fin thickness (base area 50 × 50 mm2, base temperature 85°C). Table 3 Heat sink design parameters. Parameter . Symbol . Value . Fin thickness t 0.76 mm Fin spacing z 2.78 mm Number of fins ns 18 Mass of heat sink m 56.27 g Profile length b 30 mm Base length L 50 mm Base width W 50 mm Total heat rejected qt 205.52 W Total area of the heat sink A 5.76 × 104 mm2 Total heat sink resistance Rt 0.23 K/W Heat sink efficiency η 0.74 Heat sink effectiveness ε 55.11 Heat transfer coefficient h 109.39 W/m2. K Pressure drop |$\varDelta P$| 82.48 Pa Fan power |${P}_{power}$| 2.2 W Parameter . Symbol . Value . Fin thickness t 0.76 mm Fin spacing z 2.78 mm Number of fins ns 18 Mass of heat sink m 56.27 g Profile length b 30 mm Base length L 50 mm Base width W 50 mm Total heat rejected qt 205.52 W Total area of the heat sink A 5.76 × 104 mm2 Total heat sink resistance Rt 0.23 K/W Heat sink efficiency η 0.74 Heat sink effectiveness ε 55.11 Heat transfer coefficient h 109.39 W/m2. K Pressure drop |$\varDelta P$| 82.48 Pa Fan power |${P}_{power}$| 2.2 W Open in new tab Table 3 Heat sink design parameters. Parameter . Symbol . Value . Fin thickness t 0.76 mm Fin spacing z 2.78 mm Number of fins ns 18 Mass of heat sink m 56.27 g Profile length b 30 mm Base length L 50 mm Base width W 50 mm Total heat rejected qt 205.52 W Total area of the heat sink A 5.76 × 104 mm2 Total heat sink resistance Rt 0.23 K/W Heat sink efficiency η 0.74 Heat sink effectiveness ε 55.11 Heat transfer coefficient h 109.39 W/m2. K Pressure drop |$\varDelta P$| 82.48 Pa Fan power |${P}_{power}$| 2.2 W Parameter . Symbol . Value . Fin thickness t 0.76 mm Fin spacing z 2.78 mm Number of fins ns 18 Mass of heat sink m 56.27 g Profile length b 30 mm Base length L 50 mm Base width W 50 mm Total heat rejected qt 205.52 W Total area of the heat sink A 5.76 × 104 mm2 Total heat sink resistance Rt 0.23 K/W Heat sink efficiency η 0.74 Heat sink effectiveness ε 55.11 Heat transfer coefficient h 109.39 W/m2. K Pressure drop |$\varDelta P$| 82.48 Pa Fan power |${P}_{power}$| 2.2 W Open in new tab 3. THREE-DIMENSIONAL NUMERICAL SIMULATION The EEM described above is validated by comparison with the results obtained from a 3D numerical simulation. The 3D numerical model is developed using ANSYS,2017-R1 CFX integrated with ANSYS,2017-R1 Thermal-Electric software packages for fluid flow and thermoelectric analysis, respectively. SOLIDWORKS 2016 software is also used to create the part models and assemble the system components, namely, the TEC module and the heat sink. Figure 6 shows the complete system implemented in ANSYS using a mesh size of 0.5 mm. Figure 6 Open in new tabDownload slide ANSYS model of the overall system including microprocessor, TEC module and heat sink using a mesh size of 0.5 mm. Figure 6 Open in new tabDownload slide ANSYS model of the overall system including microprocessor, TEC module and heat sink using a mesh size of 0.5 mm. After the system components are drawn and assembled, the geometry is imported into Ansys CFX to simulate air passing through the heat sink fins by placing the heat sink inside an air duct, as shown in Figure 7. The boundary condition at the air duct inlet is air velocity at room temperature, while the boundary condition at the exit is zero gauge pressure. Figure 7 Open in new tabDownload slide ANSYS CFX model of heat sink flow. Figure 7 Open in new tabDownload slide ANSYS CFX model of heat sink flow. The thermoelectric analysis was then conducted using Ansys Thermal-Electric. This software allows the manual input of material properties of thermoelectric elements, as well as the input of electrical current to the TEC module. The TEC couple and module design parameters and specifications, shown in Figure 3 and Table 1, respectively, were implemented for the thermoelectric analysis. Two boundary conditions were set for this simulation. The first boundary condition was set as electrical current at one of the TEC module’s poles and zero volts at the other pole, representing ground. The second boundary condition was the temperature at the bottom of the block which was set at 94°C, representing the microprocessor temperature. The boundary conditions of the ANSYS Thermal-Electric model are shown in Figure 8. Figure 8 Open in new tabDownload slide ANSYS Thermal-Electric model boundary conditions: arrow A is the input current position, arrow B is the input voltage position, which is set at 0 Volts to define the grounding system, and arrow C is the microprocessor temperature. Figure 8 Open in new tabDownload slide ANSYS Thermal-Electric model boundary conditions: arrow A is the input current position, arrow B is the input voltage position, which is set at 0 Volts to define the grounding system, and arrow C is the microprocessor temperature. The simulation procedure and integration of the CFX model with the Thermal-Electric model are as follows: Set the airflow temperature and velocity in the CFX toolbox to calculate the convective heat transfer coefficient, h. Import the resulting value of the heat transfer coefficient to the Thermal-Electrical toolbox. Use the heat transfer coefficient as a boundary condition in Thermal-Electrical analysis. Calculate the junction’s temperature (Tc is the module’s junction’s temperature from the microprocessor side, and Th is the module’s junction’s temperature from the heat sink side) for input current values from 1A to 7A. Calculate the cooling power, Qc, and heat rejection, Qh, by integrating the heat fluxes at the cold and hot sides of the TEC. Calculate the input power, Pin, and COP using Equations (10-b) and (11). As a cross-check for the accuracy of the solution, substitute the resulting values of the junction’s temperatures, Th and Tc, into the design Equations (8) to (11) to obtain Qc, Qh, Pin and COP, and evaluate the error in the calculations. 4. EXPERIMENTAL SETUP An experimental setup using a commercially available TEC module is also built for the purpose of validating the proposed EEM. The UT15-200-F2-4040 thermoelectric module is purchased from Laird Thermal Systems [18] and is assembled using bismuth telluride as the semiconductor material. The performance characteristics and data sheet specifications of the module are provided in Table 4. It should be noted that the surface area of the TEC module is 40 × 40 mm2, which is different from the microprocessor surface and the design shown in Figure 1. Also, the TEC module parameters are not optimized for cooling of the selected microprocessor. Therefore, the experimental results are only used for the purpose of validating the analytical and 3D simulations. The selected heat sink is 40 × 40 × 20 mm and is made from aluminum. The values shown in Table 4 are used to calculate the effective material properties used in the analytical model while comparing with the experimental results. The geometric parameters of the experimental module are measured and used as inputs in the models. Table 4 TEC module performance specifications, Laird UT15-200-F2-4040 [ 18]. Hot side temperature (°C) . 25 . 50 . Qmax (W) 236.6 254.9 ∆Tmax (°C) 68 75 Imax (A) 15.4 15.4 Vmax (V) 25.0 28.6 Module resistance (Ohms) 1.37 1.54 Thickness 3.3 mm Area 40 × 40 mm Number of couples 200 Hot side temperature (°C) . 25 . 50 . Qmax (W) 236.6 254.9 ∆Tmax (°C) 68 75 Imax (A) 15.4 15.4 Vmax (V) 25.0 28.6 Module resistance (Ohms) 1.37 1.54 Thickness 3.3 mm Area 40 × 40 mm Number of couples 200 Open in new tab Table 4 TEC module performance specifications, Laird UT15-200-F2-4040 [ 18]. Hot side temperature (°C) . 25 . 50 . Qmax (W) 236.6 254.9 ∆Tmax (°C) 68 75 Imax (A) 15.4 15.4 Vmax (V) 25.0 28.6 Module resistance (Ohms) 1.37 1.54 Thickness 3.3 mm Area 40 × 40 mm Number of couples 200 Hot side temperature (°C) . 25 . 50 . Qmax (W) 236.6 254.9 ∆Tmax (°C) 68 75 Imax (A) 15.4 15.4 Vmax (V) 25.0 28.6 Module resistance (Ohms) 1.37 1.54 Thickness 3.3 mm Area 40 × 40 mm Number of couples 200 Open in new tab The complete experimental set up is shown in Figure 9. An adjustable DC power supply (0–30 V/0–10 A) is also used to supply the TEC module with varying electrical currents. The TEC module is placed between two aluminum blocks with dimensions of 40 × 40 × 20 mm3 and 40 × 40 × 200 mm3. Two K-type thermocouples with a diameter of 2 mm and a depth of 20 mm are inserted in each aluminum block at the location of interest, as illustrated in the schematic Figure 9. Thermal paste is used at the interfaces between the blocks and the TEC module to obtain better heat conduction and minimize the thermal resistance. An adjustable 1000 W electrical heater is used to generate heat. A dimmer (4000 W, AC 220 V) variable voltage controller is used to adjust the air blower speed. It should be noted that the lower aluminum block in contact with the electric heater is long enough (200 mm length) to ensure 1D and uniform heat flux at the bottom surface of the TEC module and minimize errors associated with the calculation of heat flux using temperature measurements. The measured value of heat flux is used in the analysis and there no need to insulate the electric heater at the bottom. The experimental setup components also include an air blower with a capacity of 170 m3/h and a 3D-printed air duct containing the heat sink, which ensures that the air passes through the fins of the heat sink. A digital anemometer is also used to measure the airflow speed at the outlet of the duct. Figure 9 Open in new tabDownload slide Assembly of experimental setup as well as the schematic diagram of the experiment. Figure 9 Open in new tabDownload slide Assembly of experimental setup as well as the schematic diagram of the experiment. Figure 10 Open in new tabDownload slide Comparison of TEC input power measurements and Pin, using heat balance and voltage and current measurements. Figure 10 Open in new tabDownload slide Comparison of TEC input power measurements and Pin, using heat balance and voltage and current measurements. To emulate the heat generated from microprocessors, the input power to the electrical heater installed at the bottom of the lower aluminum block was controlled. The amount of heat is adjusted to keep T2, the equivalent of the microprocessor junction temperature, Tp, constant for all experiment tests. Tp is also considered constant in the TEC model. The experimental procedure is carried out as follows: Set the flow velocity of air to a constant value throughout the experiment to maintain a constant thermal conductance. Record temperature readings of T5 and T6 to find the average air temperature, T∞. Set the desired electrical current and adjust the heater to maintain a constant temperature of T2 until other temperatures reach steady state. Record temperature readings of T3 and T4 and apply the extrapolation method to find the hot junction temperature |${T}_h$|⁠. Record temperature readings of T1 and T2 and apply the extrapolation method to find the cold junction temperature |${T}_c$|⁠. Substitute the |${T}_c$| and |${T}_h$| in Equations (7), (8), (10-a) and (11) to find|${Q}_h$|⁠, |${Q}_c$|⁠, |${P}_{in}$| and COP, respectively. The input power, |${P}_{in}$|⁠, can be also calculated using Equation (10-b) to ensure the thermal balance and accuracy of measurements. The uncertainty of the measurement of the junction temperatures, Tc and Th, by extrapolation depends on the uncertainty in the temperature measurement and the distance measurements of the actual thermocouple locations. The manufacturing uncertainty associated with machining these holes was estimated to be ±0.1 mm. Cumulatively, the total uncertainty of the 5 mm distance between the thermocouples is ±4%. The thermocouples T2 and T3 are placed at distances of 5 and 10 mm from the TEC surface, respectively. The thermocouples have a measurement error of ±0.5°C, corresponding to an uncertainty of ±1%. Using the theory of uncertainty propagation [5], the resulting uncertainty in the calculation of Tc and Th is about ±0.8%. Using Equations (7), (8) and (10), the uncertainty in Qc, Qh and input power|${P}_{in}$| is between ±1 and ±2%. The errors in the voltage and current measurements are ±0.5 mA and ± 5 μV, respectively, which results in a maximum uncertainty of ±2% in the input power value using the measured voltage and current. Comparisons of the power measurement as the difference between Qh and Qc using Equations (10-a) and as the product of V and I using Eq. (10-b) are shown in Figure 10. It can be seen that the power measurements using Equations (10-a) and (10-b) agree very closely, with a small deviation between the two methods occurring at relatively high electric current values. This can be explained by temperature-independent effective TEC properties, as discussed in Section 5.1, which occur at high input currents. Also, small differences (less than 5%) in input power measurements using the two methods can be attributed to the effects of thermal and electrical contact resistances in the experimental setup. Overall, close agreement in the measurement of Pin using temperature measurements and V × I confirms the thermal balance and accuracy of the experiments. 5. VALIDATION OF TEC EEM In this section, results obtained using the EEM are compared with the experimental and 3D numerical results. After the EEM is validated, it can be widely used for design and optimization of TECs for microprocessor cooling applications. 5.1. Effective material properties Effective material properties for the thermoelectric module used in the present study are first estimated using Equations (12) to (15) by using the maximum parameters from the manufacturer’s datasheet, listed in Table 5 below. Table 5 Material properties of the Laird UT15-200-F2-4040 module. |${\alpha}^{\ast }$| . |${R}^{\ast }$| . |${K}^{\ast }$| . |${Z}^{\ast }$| . 419.77 |$\frac{\mu V}{K}$| 6.27 × 10−3 Ω 0.011 |$\frac{W}{K}$| 0.77 |${\alpha}^{\ast }$| . |${R}^{\ast }$| . |${K}^{\ast }$| . |${Z}^{\ast }$| . 419.77 |$\frac{\mu V}{K}$| 6.27 × 10−3 Ω 0.011 |$\frac{W}{K}$| 0.77 Open in new tab Table 5 Material properties of the Laird UT15-200-F2-4040 module. |${\alpha}^{\ast }$| . |${R}^{\ast }$| . |${K}^{\ast }$| . |${Z}^{\ast }$| . 419.77 |$\frac{\mu V}{K}$| 6.27 × 10−3 Ω 0.011 |$\frac{W}{K}$| 0.77 |${\alpha}^{\ast }$| . |${R}^{\ast }$| . |${K}^{\ast }$| . |${Z}^{\ast }$| . 419.77 |$\frac{\mu V}{K}$| 6.27 × 10−3 Ω 0.011 |$\frac{W}{K}$| 0.77 Open in new tab The maximum cooling power, Qmax, is the maximum thermal load, which occurs at I = Imax and Tc = Th; this can be obtained by substituting both I and Tc in Equation (1) with Imax and Th. Then, using the calculated material properties, the values of Qmax can be obtained. Figure 11 provides a comparison between the calculations (solid lines) and the manufacturer’s performance data (triangles) for the TEC module. As can be seen, the calculated effective maximum parameters, ∆Tmax, Imax and Qmax, are in good agreement with the manufacturer’s performance curves. Using the effective material properties in the ideal equations accounts for uncertainties associated with electrical and thermal contact resistances and the Thomson effect [35]. The uncertainty associated with using the effective material properties can be evaluated by comparing the TEC input power using measurements of input, V × I and Qh–Qc, as given by Equations (10-a) and (10-b), and as shown in Figure 10. The maximum difference between the TEC input power values obtained using the EEM model and Qh–Qc is less than ±0.5% and increases to ±2.5% as compared to the measured value of V × I. These low uncertainty values indicate the accuracy of the measurements carried out in the present study and the importance of using effective material properties of TEC modules in the design models. Figure 11 Open in new tabDownload slide Performance curves of the Laird UT15-200-F2-4040 TEC module; the solid line is calculated using the effective material properties; points represent the manufacturer data for different values of electric current. Figure 11 Open in new tabDownload slide Performance curves of the Laird UT15-200-F2-4040 TEC module; the solid line is calculated using the effective material properties; points represent the manufacturer data for different values of electric current. Figure 12 Open in new tabDownload slide Effects of mesh size on the calculated values of Qh, Qc and input power. Figure 12 Open in new tabDownload slide Effects of mesh size on the calculated values of Qh, Qc and input power. 5.2. Comparisons with 3D numerical results Comparisons of the EEM and 3D numerical model are carried out. The TEC module and heat sink characteristics used in this study are listed in Tables 1 and 3. After defining the boundary conditions in Ansys CFX and integrating the ANSYS Thermal-Electrical simulation software, the electrical current is manually input for each simulation run and the system is solved. A mesh refinement study is carried out using mesh sizes of 1.5 mm, 1.25 mm, 1.0 mm, 0.75 mm and 0.5 mm. The effects of mesh size on the calculated values of Qh and Qc for different values of input current are shown in Figure 12a. Refining the mesh from 1.5 to 1.0 mm, and from 1.0 mm to 0.5 mm, results in differences in the Qh and Qc calculation of about 10% and 3%, respectively. An accurate measure of grid size independence results can also be evaluated by comparing the calculated input power Pin using (Qh–Qc) and (V × I). Figure 12b shows the difference in calculated input power for different mesh sizes and different values of input current. It can be observed that using a mesh size of 0.5 mm results in a maximum difference in calculated input power of 2.3%. The difference in calculations of Pin, Qh and Qc using different mesh sizes is smaller at values of input current less than 5 A. The temperature distribution throughout the heat sink and the TEC module for different mesh sizes is presented in the simulation results shown in Figure 13. The results obtained using a 0.5 mm mesh size are considered accurate and grid independent. Figure 13 Open in new tabDownload slide Temperature distribution in the system using a 3D numerical model with a mesh size of 0.5 mm; the model geometric and thermophysical parameters are listed in Tables 1 and 3. Figure 13 Open in new tabDownload slide Temperature distribution in the system using a 3D numerical model with a mesh size of 0.5 mm; the model geometric and thermophysical parameters are listed in Tables 1 and 3. The junction cold and hot temperatures for each input current and for every simulation run were recorded and compared to those obtained using the EEM. Figures 14 and 15 show comparisons of Qh and Qc, and TEC module junction temperatures, Th and Tc, for a range of electrical currents. Good agreement can be observed between the EEM and the 3D model numerical results. It can be observed from Figure 15 that input current values higher than 4.6 A are necessary to achieve effective cooling with an increase in the delta between the hot and cold junction temperatures with increasing input current. Figure 14 Open in new tabDownload slide Comparisons of Qh and Qc for different values of electrical current obtained using the EEM (solid lines) and 3D simulation results (symbols), with a mesh size of 0.5 mm, and model geometric and thermophysical parameters as listed in Table 1. Figure 14 Open in new tabDownload slide Comparisons of Qh and Qc for different values of electrical current obtained using the EEM (solid lines) and 3D simulation results (symbols), with a mesh size of 0.5 mm, and model geometric and thermophysical parameters as listed in Table 1. Figure 15 Open in new tabDownload slide Comparisons of TEC module cold and hot junction temperatures, Th and Tc, for different values of electrical current obtained using the EEM (solid lines) and 3D simulation results (symbols), with a mesh size of 0.5 mm, and model geometric and thermophysical parameters are listed in Table 1. Figure 15 Open in new tabDownload slide Comparisons of TEC module cold and hot junction temperatures, Th and Tc, for different values of electrical current obtained using the EEM (solid lines) and 3D simulation results (symbols), with a mesh size of 0.5 mm, and model geometric and thermophysical parameters are listed in Table 1. 5.3. Comparisons with experimental results Further comparisons of the EEM and 3D numerical models with experimental results were carried out. The experimental setup components’ properties and geometric parameters of the TEC module and the heat sink reported in Tables 3 and 4 were used in the analysis. The TEC module and heat sink contact surface area is 40 × 40 mm2. Figures 16 and 17 illustrate comparisons between the measured and predicted TEC heat transfer rates, Qh and Qc, and junction temperatures, Th and Tc, respectively. Relatively small differences in the values are observed, which are likely a result of the contact resistance between the TEC module and the upper and lower aluminum blocks, meaning a non-perfect insulation. In general, the comparison of results shows good agreement. Thus, the EEM model can be used as a simple and reliable tool for design optimization, as explained in the following section. Figure 16 Open in new tabDownload slide Comparisons of the TEC module (Qh, Qc) for different values of electrical current obtained using the EEM, 3D simulation results and experimental results; the model geometric and thermophysical parameters are listed in Tables 3 and 4. Figure 16 Open in new tabDownload slide Comparisons of the TEC module (Qh, Qc) for different values of electrical current obtained using the EEM, 3D simulation results and experimental results; the model geometric and thermophysical parameters are listed in Tables 3 and 4. 6. ANALYSIS AND OPTIMIZATION OF TEC PERFORMANCE FOR MICROPROCESSOR COOLING The results and comparisons presented above demonstrate the ability of the EEM to accurately predict the TEC module performance. The present EEM has been used to conduct parametric analyses and optimization for the design of the TEC module and heat sink for microprocessor cooling. As a case study, a microprocessor power of 165 W representing the newest generation of the technology is considered. The analysis shows that, if two temperatures at the microprocessor surface and cooling fluid are known, an optimal design always exists and can be determined [11]. The objective of design optimization for our case study is to use the thermophysical properties of the module listed in Table 1, and the heat sink optimum design parameters listed in Table 3, to optimize the input current and geometric ratio to maximize the cooling power. The constraints for this optimization task are a required microprocessor cooling power of 165 W, a surface area of the TEC module of 50 × 50 mm2, a cooling air temperature of 30°C and a microprocessor junction temperature of 94°C. The EEM governing equations can be easily used to solve this optimization problem. A Mathcad program is implemented in the present study to search for the solution of this optimization problem. The optimum values for input current and geometric ratio of the TEC module are determined to be 4.69 A and 0.144 cm, respectively. Based on these results, the optimum design parameters of the TEC for a microprocessor power of 165 W are shown in Table 6. The number of couples, n, is determined using the optimum values for Ge within the available surface area of 50 × 50 mm2. The heat sink design optimum parameters are listed in Table 3. Figure 17 Open in new tabDownload slide Comparisons of TEC module cold and hot junctions temperatures (Th, Tc) for different values of electrical current obtained using the EEM, 3D simulation results and experimental results; the model geometric and thermophysical parameters are listed in Tables 3 and 4. Figure 17 Open in new tabDownload slide Comparisons of TEC module cold and hot junctions temperatures (Th, Tc) for different values of electrical current obtained using the EEM, 3D simulation results and experimental results; the model geometric and thermophysical parameters are listed in Tables 3 and 4. Table 6 Details for the optimum design parameters of a TEC module for cooling a 165 W microprocessor. Parameter . Optimization goal . Optimization constraint . Optimum design (50 × 50) mm2 . Qc (W) Maximize Qc Required cooling capacity 165 COP Maximize COP Required cooling capacity 2.4 |$\eta hA=1/{R}_t$| (W/K) Maximize Qh Surface area of TE module 50 × 50 mm2 Refer to Table 3 for details of heat sink optimization Tp (⁠|${}^{\circ}\mathrm{C}$|⁠) Maximum allowable microprocessor junction temperature 94 T∞ (⁠|${}^{\circ}\mathrm{C}$|⁠) Ambient air temperature 30 |$\alpha$|(⁠|$\frac{\mu V}{K}$|⁠) TE module effective properties; refer to Table 5 419.77 |$R$| (Ω) 6.27 × 10−3 |$K$| (⁠|$\frac{W}{m\ K}$|⁠) 0.011 Ge (cm) Results of optimization 0.144 n Surface area of TE module 50 × 50 mm2 204 Tc (⁠|${}^{\circ}\mathrm{C}$|⁠) 74 Th (⁠|${}^{\circ}\mathrm{C}$|⁠) 77.60 I (A) 4.69 Parameter . Optimization goal . Optimization constraint . Optimum design (50 × 50) mm2 . Qc (W) Maximize Qc Required cooling capacity 165 COP Maximize COP Required cooling capacity 2.4 |$\eta hA=1/{R}_t$| (W/K) Maximize Qh Surface area of TE module 50 × 50 mm2 Refer to Table 3 for details of heat sink optimization Tp (⁠|${}^{\circ}\mathrm{C}$|⁠) Maximum allowable microprocessor junction temperature 94 T∞ (⁠|${}^{\circ}\mathrm{C}$|⁠) Ambient air temperature 30 |$\alpha$|(⁠|$\frac{\mu V}{K}$|⁠) TE module effective properties; refer to Table 5 419.77 |$R$| (Ω) 6.27 × 10−3 |$K$| (⁠|$\frac{W}{m\ K}$|⁠) 0.011 Ge (cm) Results of optimization 0.144 n Surface area of TE module 50 × 50 mm2 204 Tc (⁠|${}^{\circ}\mathrm{C}$|⁠) 74 Th (⁠|${}^{\circ}\mathrm{C}$|⁠) 77.60 I (A) 4.69 Open in new tab Table 6 Details for the optimum design parameters of a TEC module for cooling a 165 W microprocessor. Parameter . Optimization goal . Optimization constraint . Optimum design (50 × 50) mm2 . Qc (W) Maximize Qc Required cooling capacity 165 COP Maximize COP Required cooling capacity 2.4 |$\eta hA=1/{R}_t$| (W/K) Maximize Qh Surface area of TE module 50 × 50 mm2 Refer to Table 3 for details of heat sink optimization Tp (⁠|${}^{\circ}\mathrm{C}$|⁠) Maximum allowable microprocessor junction temperature 94 T∞ (⁠|${}^{\circ}\mathrm{C}$|⁠) Ambient air temperature 30 |$\alpha$|(⁠|$\frac{\mu V}{K}$|⁠) TE module effective properties; refer to Table 5 419.77 |$R$| (Ω) 6.27 × 10−3 |$K$| (⁠|$\frac{W}{m\ K}$|⁠) 0.011 Ge (cm) Results of optimization 0.144 n Surface area of TE module 50 × 50 mm2 204 Tc (⁠|${}^{\circ}\mathrm{C}$|⁠) 74 Th (⁠|${}^{\circ}\mathrm{C}$|⁠) 77.60 I (A) 4.69 Parameter . Optimization goal . Optimization constraint . Optimum design (50 × 50) mm2 . Qc (W) Maximize Qc Required cooling capacity 165 COP Maximize COP Required cooling capacity 2.4 |$\eta hA=1/{R}_t$| (W/K) Maximize Qh Surface area of TE module 50 × 50 mm2 Refer to Table 3 for details of heat sink optimization Tp (⁠|${}^{\circ}\mathrm{C}$|⁠) Maximum allowable microprocessor junction temperature 94 T∞ (⁠|${}^{\circ}\mathrm{C}$|⁠) Ambient air temperature 30 |$\alpha$|(⁠|$\frac{\mu V}{K}$|⁠) TE module effective properties; refer to Table 5 419.77 |$R$| (Ω) 6.27 × 10−3 |$K$| (⁠|$\frac{W}{m\ K}$|⁠) 0.011 Ge (cm) Results of optimization 0.144 n Surface area of TE module 50 × 50 mm2 204 Tc (⁠|${}^{\circ}\mathrm{C}$|⁠) 74 Th (⁠|${}^{\circ}\mathrm{C}$|⁠) 77.60 I (A) 4.69 Open in new tab Figure 18 Open in new tabDownload slide System performance using EEM: (a) cooling power (solid lines) and COP (dotted lines) vs. electrical current (A) for different input currents; the TEC parameters are listed in Table 1. Figure 18 Open in new tabDownload slide System performance using EEM: (a) cooling power (solid lines) and COP (dotted lines) vs. electrical current (A) for different input currents; the TEC parameters are listed in Table 1. Figure 19 Open in new tabDownload slide Cooling power (solid line) in watts and COP (dotted lines) vs. geometric ratio in cm; the TEC parameters are listed in Table 1. Figure 19 Open in new tabDownload slide Cooling power (solid line) in watts and COP (dotted lines) vs. geometric ratio in cm; the TEC parameters are listed in Table 1. Figure 20 Open in new tabDownload slide System performance using EEM: cooling power (solid lines) and COP (dotted lines) vs. heat sink thermal conductance (η h A) for different values of input electric current, TEC parameters listed in Table 1. Figure 20 Open in new tabDownload slide System performance using EEM: cooling power (solid lines) and COP (dotted lines) vs. heat sink thermal conductance (η h A) for different values of input electric current, TEC parameters listed in Table 1. Further insights into the performance of the TEC module for microprocessor cooling regarding the significance of the obtained optimum design values can be gained by analyzing the effects of the geometric ratio and input current on cooling power and COP, as shown in Figure 18. It can be observed that, for constant input current, the cooling power and COP increase with increasing geometric ratio. In contrast, for values of Ge, the cooling power increases with increasing input current to a maximum value and then decreases, as shown in Figure 19. As expected, the COP always decreases with increasing input current. The range of Ge values is limited by the surface area of the TEC module available to distribute the TE couples; Ge = 0.2 for a 50 × 50 mm2 TEC module. Drawing a horizontal line at Qc = 165 in Figure 18 allows the identification of the minimum input current and maximum geometric ratio values to achieve this required cooling power. It can be inferred from Figure 18 that the optimum value of cooling power is achieved at lower COP values and higher input power values. The curves representing the selected optimum design values for input current, 4.69, and Ge, 0.144, were obtained using Mathcad and are shown on Figures 18 and 19. Figure 20 shows cooling power and COP as a function of heat sink thermal conductance, η h A, for varying input electric current. For all values of electric current, it can be seen that the values of QC and COP initially increase with increasing heat sink thermal conductance. The increase in COP and QC is relatively small for high values of η h A. Curves representing QC and COP obtained using optimum values of Ge and input current are also shown on Figure 19. From the design perspective, the heat sink thermal conductance can be minimized as far as possible. However, for a given required cooling power of the present microprocessor (165 W) and optimized heat sink geometry, listed in Table 3, a heat sink thermal conductance of about 5 W/K is considered sufficient. Increasing the heat sink thermal conductance would result in more capacity to dissipate heat from the TEC module; however, this would be at the expense of higher heat sink fan power requirements. It should be noted that liquid cooling solution is typically used for cooling the processor used in the present study [14], consisting of a combined heat sink with a liquid pump and a radiator. The small unit circulates water to keep the CPU cool when it is idling and when it is under full load. It automatically adjusts the rate of cooling based on the CPU temperature. The use of a TEC module would offer the advantages of low cost, low noise and high reliability. The present study focused on the design of a customized TEC module and heat sink for a particular microprocessor. The common practice of selecting commercially available TEC modules and heat sinks would result in poor performance or an inability to meet the microprocessor cooling requirements. Figure 21 compares the performance obtained using the commercial TEC module, listed in Table 4, and the TEC module with optimized parameters, listed in Table 6, obtained using the EEM model as recommended in the present study. Higher performance was obtained using the TEC module with optimized parameters. It can be observed that, for the same input power, the cooling capacity of the TEC system with optimized parameters is ~70% higher than that of commercially available TEC modules of equivalent surface area. In addition, the COP of the optimized module is slightly higher than that of the commercial module. 7. CONCLUSION The major contribution of the present study is the development of a simple and robust design tool to optimize thermoelectric cooling systems for current high power density microprocessors. The developed model considers different design and operation parameters affecting the performance of a TEC module with an air-cooled heat sink. The model was validated by comparison with the results obtained from detailed 3D numerical simulations and experimental measurements. Design and optimization of TEC systems for electronic devices aim to meet the high cooling requirements and maximize the COP. To demonstrate the capability of the proposed model and to analyze the performance of a microprocessor thermoelectric cooling system, a case study involving the cooling of recent available microprocessor with a power dissipation requirement of 165 W is considered. The main findings of the present study are summarized as follows: Using effective material properties in the model equations reduces the uncertainty in the calculation of TEC input power to less than ±2.5%. At a constant input current, the cooling power and COP increase with increasing geometric ratio. In addition, at a constant geometric ratio, the cooling power increases with increasing input current to a maximum value and then decreases; the COP always decreases with increasing input current. The optimum values for input current and geometric ratio of a TEC module for cooling current microprocessors are determined to be 4.69 A and 0.144 cm, respectively. The present study highlights the importance of designing and fabricating high-performance TEC modules with optimum parameters for cooling specific electronic components. For the same input power, the cooling capacity of the TEC system with optimized parameters is about 70% higher than that of commercially available TEC modules. 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TI - Design, modeling and parametric optimization of thermoelectric cooling systems for high power density electronic devices
JF - International Journal of Low-Carbon Technologies
DO - 10.1093/ijlct/ctab032
DA - 2021-04-27
UR - https://www.deepdyve.com/lp/oxford-university-press/design-modeling-and-parametric-optimization-of-thermoelectric-cooling-PvtMv5OwLU
SP - 1
EP - 1
VL - Advance Article
IS - 
DP - DeepDyve
ER -