TY - JOUR
AU - Narmadha, R.
AB - It has only recently become possible to build the system on a chip (SoC) platform that makes use of field-programmable gate arrays (FPGAs) to moderate the amount of computational load placed on the main processor's CPU core. On the reconfigurable fabric, data used by both the software and the hardware is mapped using optimised memory mapping algorithm that was developed specifically for this purpose. This memory mapping algorithm serves as the base for the entire method. In this work, proposed a novel technique which is optimal energy efficient load aware memory management (ELMM) technique and it concentrated on the amount of extra storage after mapping using task monitoring algorithm and it reduces the energy consumption. The experimental results reveal that the proposed ELMM system of FPGA memory resources can be obtained at a much lower latency with minimal resource overhead and lower power consumption. Implementation of this work can done by using the Xilinx ISE 14.4 simulator and also generated the waveforms.
TI - Optimal energy efficient, load aware memory management system on SoC’s for industrial automation
JF - Applied Nanoscience
DO - 10.1007/s13204-021-02098-7
DA - 2023-03-01
UR - https://www.deepdyve.com/lp/springer-journals/optimal-energy-efficient-load-aware-memory-management-system-on-soc-s-NSEpE3qlOJ
SP - 2103
EP - 2114
VL - 13
IS - 3
DP - DeepDyve
ER -