TY - JOUR
AU - 
AB - We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microproce
TI - APRON: A Cellular Processor Array Simulation and Hardware Design Tool
JF - EURASIP Journal on Advances in Signal Processing
DO - 10.1155/2009/751687
DA - 2009-07-27
UR - https://www.deepdyve.com/lp/wiley/apron-a-cellular-processor-array-simulation-and-hardware-design-tool-N0cdrUBwoq
VL - 2009
IS - 2009
DP - DeepDyve
ER -