TY - JOUR
AU - Jachna, Z
AB - We present a time digitizer having 45 ps resolution, integrated in a field programmable gate array (FPGA) device. The time interval measurement is based on the two-stage interpolation method. A dual-edge two-phase interpolator is driven by the on-chip synthesized 250 MHz clock with precise phase adjustment. An improved dual-edge double synchronizer was developed to control the main counter. The nonlinearity of the digitizer's transfer characteristic is identified and utilized by the dedicated hardware code processor for the on-the-fly correction of the output data. Application of presented ideas has resulted in the measurement uncertainty of the digitizer below 70 ps RMS over the time interval ranging from 0 to 1 s. The use of the two-stage interpolation and a fast FIFO memory has allowed us to obtain the maximum measurement rate of five million measurements per second.
TI - A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device
JF - Measurement Science and Technology
DO - 10.1088/0957-0233/20/2/025108
DA - 2009-02-01
UR - https://www.deepdyve.com/lp/iop-publishing/a-45-ps-time-digitizer-with-a-two-phase-clock-and-dual-edge-two-stage-Gyf7pyzZE0
SP - 025108
VL - 20
IS - 2
DP - DeepDyve
ER -