TY - JOUR
AU - Shrivastava, Aviral
AB -  Enabling Energy Efficient Reliability in Embedded Systems Through Smart Cache Cleaning REILEY JEYAPAUL and AVIRAL SHRIVASTAVA, Compiler Microarchitecture Lab, Arizona State University Incessant and rapid technology scaling has brought us to a point where today's, and future transistors are susceptible to transient errors induced by energy carrying particles, called soft errors. Within a processor, the sheer size and nature of data in the caches render it most vulnerable to electrical interference on data stored in the cache. Data in the cache is vulnerable to corruption by soft errors, for the time it remains actively unused in the cache. Write-through and early-write-back [Li et al. 2004] cache configurations reduce the time for vulnerable data in the cache, at the cost of increased memory writes and thereby energy. We propose a smart cache cleaning methodology, that enables copying of only specific vulnerable cache blocks into the memory at chosen times, thereby ensuring data cache protection with minimal memory writes. In this work, we first propose a hybrid (software-hardware) methodology. We then propose an improved software solution that utilizes cache write-back functionality available in commodity processors; thereby reducing the hardware overhead required to implement smart cache cleaning for such systems. The 
TI - Enabling energy efficient reliability in embedded systems through smart cache cleaning
JF - ACM Transactions on Design Automation of Electronic Systems (TODAES)
DO - 10.1145/2505012
DA - 2013-10-01
UR - https://www.deepdyve.com/lp/association-for-computing-machinery/enabling-energy-efficient-reliability-in-embedded-systems-through-3TNTmdUX7f
SP - 1
VL - 18
IS - 4
DP - DeepDyve
ER -