TY - JOUR
AU - Liu,, Dong
AB - Abstract The borehole azimuthal acoustic reflection imaging logging tool (BAAR) is a new generation of imaging logging tool, which is able to investigate stratums in a relatively larger range of space around the borehole. The BAAR is designed based on the idea of modularization with a very complex structure, so it has become urgent for us to develop a dedicated test-bench system to debug each module of the BAAR. With the help of a test-bench system introduced in this paper, test and calibration of BAAR can be easily achieved. The test-bench system is designed based on the client/server model. The hardware system mainly consists of a host computer, an embedded controlling board, a bus interface board, a data acquisition board and a telemetry communication board. The host computer serves as the human machine interface and processes the uploaded data. The software running on the host computer is designed based on VC++. The embedded controlling board uses Advanced Reduced Instruction Set Machines 7 (ARM7) as the micro controller and communicates with the host computer via Ethernet. The software for the embedded controlling board is developed based on the operating system uClinux. The bus interface board, data acquisition board and telemetry communication board are designed based on a field programmable gate array (FPGA) and provide test interfaces for the logging tool. To examine the feasibility of the test-bench system, it was set up to perform a test on BAAR. By analyzing the test results, an unqualified channel of the electronic receiving cabin was discovered. It is suggested that the test-bench system can be used to quickly determine the working condition of sub modules of BAAR and it is of great significance in improving production efficiency and accelerating industrial production of the logging tool. BAAR, test-bench, logging tool calibration, ARM7, FPGA, uClinux 1. Introduction In order to break through the limitation of detection range (less than 3 m) and reflect the formation in a larger range around the borehole while logging, the technicians have developed the acoustic reflection imaging logging tool for remote exploration whose detecting range reaches up to 10 m (Xue et al2002). However, limited by the instrument structure and techniques used at that time, the tool cannot provide the distance and azimuth information of the detected geological structure relative to the borehole. Against this background, the Acoustic Logging Laboratory of China University of Petroleum, Beijing, has proposed the azimuthal acoustic reflection logging method and developed the BAAR. The tool not only images the formation boundaries and fractures near the borehole, but also provides the distance and azimuth of the geological structures accurately. BAAR is developed based on the techniques of phased arc array acoustic transmitters and azimuthal array receivers and is composed of a modularized acoustic sonde. The multi-channel synchronous data acquisition circuit is encapsulated in a sealed electronic cabin and then integrated with the transducer array in the acoustic sonde (Ju et al2012), making up an acoustic sonde which is also called the active acoustic sonde. As shown in figure 1, the BAAR mainly consists of the master electronic sub, active acoustic receiving sonde, sound insulator, active acoustic receiving–transmitting sonde, conventional acoustic transmitting sonde and conventional electronic sub. The active acoustic receiving sonde consists of 64 acoustic receiving transducers and 4 sealed electronic cabins; the active acoustic receiving–transmitting sonde consists of 32 acoustic transmitting transducers, 8 acoustic receiving transducers and 3 sealed electronic cabins. With the employment of the active acoustic sonde, the logging tool is equipped with more than 100 acoustic transducers and nearly 10 sealed electronic cabins. The inner modules of the tool communicate with each other through the Tool Module Bus (TMB) (Ju et al2012). With an extremely complex structure, the logging tool has caused a lot of inconvenience in both its production and calibration. So far, the test-bench systems for the multi-array induction imaging logging tool (Men et al2011) and the multipole array acoustic logging tool (Lu et al2012) have been developed and played a significant role in production and maintenance of the corresponding tool. However, these systems cannot be applied directly to BAAR due to its special purpose and developing method. Therefore, it has become a necessity to specially develop a test-bench system for BAAR, which is also the main concern of this paper. Figure 1. Open in new tabDownload slide Structure of the BAAR. Figure 1. Open in new tabDownload slide Structure of the BAAR. The development of the test-bench system mainly consists of hardware design and software design, which are to be introduced separately in the following chapters. 2. Hardware design The test-bench system of BAAR is developed based on the client/server model. The main circuit boards pile up in the same way as building blocks, which is space saving with reliable connections. The hardware component of the test-bench system is shown in figure 2. As the figure indicates, it mainly consists of the host computer (Notebook PC), embedded controlling board, bus interface board, data acquisition board and telemetry communication board. All boards are connected via an extensional bus interface. The host computer communicates with the embedded controlling board via Ethernet. The embedded controlling board communicates with the bus interface board, data acquisition board and telemetry communication board via Extended I/O Bus (EIOB) (Ju et al2009). The host computer realizes functions such as data processing, graphic displaying, data storage and network communication with the embedded controlling board; while the embedded controlling board realizes functions such as test control, data acquisition and internetworking. The bus interface board is integrated with the high-speed interconnection TMB and a signal generator for acoustic waveform simulation. The TMB interface can link all the subs of BAAR. The telemetry communication board is provided with Controller Area Network (CAN) interface, it is used to link the master electronic sub and the BAAR. The data acquisition board realizes analog signal acquisition and processing in eight channels, it is used for the collection of voltage signal from the master electronic sub. Figure 2. Open in new tabDownload slide Structure of the test-bench system for BAAR. Figure 2. Open in new tabDownload slide Structure of the test-bench system for BAAR. The embedded controlling board is integrated with ARM7 (S3C44B0X) that serves as the micro controller. Figure 3 gives the structure of the embedded controlling board. S3C44B0X is not integrated with an Ethernet controller, so an external Ethernet interface needs to be added. Here the Ethernet controller (RTL8019AS) is used to build a 10 Mbit s-1 rate network interface. To enforce the reliability of data communication between internal boards of the system, the physical architecture of PC104 Bus is referred and adopted. By taking advantage of the BANK8 memory space of ARM7, a 16-bit bus for inter-board communication is achieved, making the internal connection and real time communication within the system much more flexible, effective and controllable. In this study, a standard 14-pin JTAG interface is added to the embedded controlling board to download and debug the program. Moreover, a serial port is added so as to monitor the software while it runs during the software developing period. As the system needs some external memory for program and data storage while S3C44B0X has no built-in memory, so here we use a 2 MB NOR FLASH chip (HY29LV160) as the storage medium for uboot, uClinux kernel and applications. Meanwhile, a 32 MB SDRAM chip (HY57V561620) with extreme accessing speed is employed to store the programs or serve as the cache while the system is running. Besides, a 16 MB NAND FLASH chip (K9F2808) is employed to save the settings for initializing and all the user parameters in the case of power failure. Figure 3. Open in new tabDownload slide Structure of the embedded controlling board. Figure 3. Open in new tabDownload slide Structure of the embedded controlling board. The telemetry communication board uses Cyclone FPGA (EP1C12Q240) as the controller. It is integrated with CAN and EIOB interfaces. Figure 4 gives the structure of the telemetry communication board. In this study, a SJA1000 chip is used as the CAN bus controller, while PCA82C250T is used as the CAN transceiver, which links to the CAN controller and drives the physical bus. To enhance the stability and anti-interference capacity of the circuit, a HCPL0600 chip for optical isolation is used to isolate the CAN controller from the CAN transceiver. The telemetry communication board transmits commands sent by the host computer, and works as the cache to store uploaded data from the instruments. In this test-bench system, the telemetry communication board is used to simulate the function of the downhole telemetry sub, thus realizing the test of the whole instrument. Figure 4. Open in new tabDownload slide Structure of the telemetry communication board. Figure 4. Open in new tabDownload slide Structure of the telemetry communication board. The bus interface board and data acquisition board both adopt FPGA (EP2C20QC8) as the micro controller. The structure of the bus interface board is shown in figure 5. The bus interface board is integrated with an EIOB interface, TMB interface and analog signal generator. The EIOB is used for data exchanging with the embedded controlling board; the TMB is used to simulate the master or slave node of instrument internal modules when switching the modes in software. The analog signal generator generates precise waveforms via the high speed Digital to Analog Converter (DAC) AD5541 (Zhang et al2014), the waveform whose amplitude and period are adjustable is downloaded into FPGA and then provided to the corresponding test module after being processed by DAC, filtering, reversing, channel selection, driving and attenuation circuit sequentially. The structure of the data acquisition board is shown in figure 6. The board is able to perform synchronous data acquisition and processing in up to eight channels at the same time. After signals are put in, one of them will be selected by the multi-channel time-sharing multiplexer ADG408 to be amplified and filtered and then converted by the Analog to Digital Converter (ADC) AD7677. After the conversion, the FPGA stores the data and uploads it if necessary. Figure 5. Open in new tabDownload slide Structure of the bus interface board. Figure 5. Open in new tabDownload slide Structure of the bus interface board. Figure 6. Open in new tabDownload slide Structure of the data acquisition board. Figure 6. Open in new tabDownload slide Structure of the data acquisition board. 3. Software design 3.1. Host computer software The host computer is the measure and control center of the test-bench system, with all tests initiated and controlled by it. The tasks to be performed by the host computer include system parameter setting, test procedure control, network communicating with the embedded controlling board, command string forwarding, data uploading, data processing, waveform displaying, etc. The host computer software is programmed in VC+  + based on the Visual Studio 2008 platform. Functional modules of the host computer software are shown in figure 7. For functional module managing and scheduling, the preemptive multitasking of the Windows kernel as well as the message driven mechanism is employed. The network communication is realized by using the technique of multithreading so as to meet the strict requirements of real-time performance. The waveform displaying function is realized based on DLL and the functional module is designed as an encapsulated library file with standard interfaces. The Multiple Document Interface (MDI) is employed so that when a test is performed on the tool or sub, by selecting the test item in the menu, the software interface can be switched to the corresponding test interface. Figure 8 shows the appearance of the software’s main interface. As shown in the figure, the test menu is integrated with test functions such as whole machine testing, master electronic sub testing, active acoustic receiving sonde testing, active acoustic receiving–transmitting sonde testing and electronic receiving cabin testing. According to the test assignment, the user may click on the corresponding option in the menu and then the test interface will be displayed. Figure 7. Open in new tabDownload slide Functional modules of the host computer software. Figure 7. Open in new tabDownload slide Functional modules of the host computer software. Figure 8. Open in new tabDownload slide The main interface of the host computer software. Figure 8. Open in new tabDownload slide The main interface of the host computer software. 3.2. Embedded controlling board software The embedded controlling board software is developed with a layered architecture based on embedded technology. As figure 9 shows, the first layer is the board-level driver, the second layer is the system kernel and the third layer is user applications. Among them, the board-level driver consists of a network chip driver, a testing board driver and other hardware drivers. The drivers control hardware components directly and are independent of the system kernel. Stored together with system files, they are loaded into the memory dynamically only when necessary, in the form of modules. The system kernel refers to the tailored uClinux 2.4 operating system that is planted into the ARM7 (Wu et al2011). It mainly realizes multitask scheduling, inter-process communication management and provides system functions for user applications. User applications refer to the codes that achieve specified tool testing purposes on the basis of the system kernel. The layered architecture of the embedded controlling board software has made it easy for maintenance and extension. Whenever a new test item should be added, the user only needs to add the new test board driver to the existing drivers and develop the corresponding user application modules. The program flow chart of the software is shown in figure 10. As the figure indicates, the test-bench system will firstly perform a self-checking after being powered on. On the completion of self-checking, hardware drivers will be initialized. After initialization, a network connection task will be created which tries to connect to the host computer and then waits for commands by means of polling. Whenever a complete data frame is received, the software decodes it and activates the corresponding test application according to the command. During the test, a thread working in non-block mode for data transmitting will be created if there is any data to be returned to the host computer. The thread will exit automatically after data has been transmitted completely. Figure 9. Open in new tabDownload slide Embedded controlling board software architecture. Figure 9. Open in new tabDownload slide Embedded controlling board software architecture. Figure 10. Open in new tabDownload slide Program flow chart of embedded controlling board software. Figure 10. Open in new tabDownload slide Program flow chart of embedded controlling board software. 3.3. Other board software The bus interface board, data acquisition board and telemetry communication board are designed based on FPGA. So the software of them is designed with VHSIC Hardware Description Language (VHDL). On the basis of modularization and top-down design strategy, the software of these boards is divided into several functional modules which are integrated in the top layer of the schematic, making up a simple and intuitional architecture that is easy for maintenance. 4. The designed system and test result The BAAR is developed with a very complex structure, thus the modules and subs need to be debugged in the laboratory before being used. Moreover, all the subs of the logging tool need to be tested on the ground before going downhole to reduce risks. To improve the portability of the test-bench system and facilitate the tests in complex field environments, the test-bench is installed in a metal chassis with exposed interfaces. Figure 11 is a photo of the test-bench for BAAR. The test-bench system can be used in the test and calibration of the whole machine, the tool subs or the electronic cabins. Among them, the whole machine refers to all of the functional parts of BAAR. Tool subs refer to the master electronic sub, the active acoustic receiving sonde and the active acoustic receiving–transmitting sonde. The electronic cabin refers to the multi-channel electronic receiving cabin, which is a critical as well as widely used module in BAAR and its performance significantly affects the accuracy of signal acquisition. In the production of the multi-channel electronic receiving cabin, the module test procedure will be too complex and time-consuming if it is only performed by using basic instruments such as an oscilloscope or multimeter, which is obviously not beneficial to the scale production. However, with the help of the test-bench system proposed in this paper, the automatic testing of the multi-channel electronic receiving cabin can be realized. In the field test, a multi-channel electronic receiving cabin is chosen as the test object. The test set-up and result are given as follows. Figure 11. Open in new tabDownload slide Photo of the test-bench. Figure 11. Open in new tabDownload slide Photo of the test-bench. The multi-channel electronic receiving cabin is the most complex part of the BAAR. It is also the most critical factor that affects tool performance. The electronic cabin performs high-speed synchronous data acquisition in 16 analog channels and uploads the acquired data to the master electronic sub through TMB. The test set-up for the multi-channel electronic receiving cabin is shown in figure 12. During the test, the electronic cabin is provided with 3.3 V, 5 V and  ±6 V power supplies and simulated analog signals to simulate its normal working conditions; the TMB master node is also provided to allow the electronic cabin to receive command strings and return waveforms. Figure 12. Open in new tabDownload slide The test set-up for the multi-channel electronic receiving cabin. Figure 12. Open in new tabDownload slide The test set-up for the multi-channel electronic receiving cabin. The test result of the four channels of the multi-channel electronic receiving cabin is shown in figure 13. Among them, S_Wave is the simulation waveform and R_Wave 1 ~ R_Wave 4 are the waveforms returned by the four channels, respectively. As the figure indicates, the returned waveforms resemble the simulation waveform in both shape and amplitude. However, by performing a statistical analysis on the simulation and returned waveforms (table 1), it is not difficult to find that R_Wave 2 deviates from the simulation waveform the most in both domain frequency and peak–peak value. For R_Wave 2, the error of peak–peak value is more than 1%, which indicates that this cabin is not able to meet the requirement of consistency in data acquisition. Therefore, the channel corresponding to R_Wave 2 needs to be inspected and repaired according to the test result. Table 1. Statistical analysis of channel waveforms of the multi-channel electronic receiving cabin. . Domain frequency/kHz . Peak–peak value/mV . S_Wave 15.500 200.00 R_Wave 1 15.505 199.26 R_Wave 2 15.512 197.68 R_Wave 3 15.498 199.75 R_Wave 4 15.496 200.17 . Domain frequency/kHz . Peak–peak value/mV . S_Wave 15.500 200.00 R_Wave 1 15.505 199.26 R_Wave 2 15.512 197.68 R_Wave 3 15.498 199.75 R_Wave 4 15.496 200.17 Open in new tab Table 1. Statistical analysis of channel waveforms of the multi-channel electronic receiving cabin. . Domain frequency/kHz . Peak–peak value/mV . S_Wave 15.500 200.00 R_Wave 1 15.505 199.26 R_Wave 2 15.512 197.68 R_Wave 3 15.498 199.75 R_Wave 4 15.496 200.17 . Domain frequency/kHz . Peak–peak value/mV . S_Wave 15.500 200.00 R_Wave 1 15.505 199.26 R_Wave 2 15.512 197.68 R_Wave 3 15.498 199.75 R_Wave 4 15.496 200.17 Open in new tab Figure 13. Open in new tabDownload slide Test result on the multi-channel electronic receiving cabin. Figure 13. Open in new tabDownload slide Test result on the multi-channel electronic receiving cabin. 5. Conclusions The design of the test-bench system refers to both hardware and software design. The hardware mainly consists of the host computer, embedded controlling board, telemetry communication board, bus interface board and data acquisition board. The software mainly consists of host computer software and embedded controlling board software. The host computer software is developed based on VC++, while the embedded controlling board software is developed based on the operating system of uClinux. The system hardware has already been designed and produced so far, with a highly efficient and extensible software system developed and downloaded in. Finally, a test was performed based on the test-bench system to inspect the channels of the multi-channel electronic receiving cabin. By comparing the waveform returned by each channel with the simulation waveform and conducting a statistical analysis on the waveforms, the unqualified channel was discovered successfully. The test-bench system for BAAR facilitates the automated testing of the whole machine and its subs during the production of the BAAR. With the help of the test-bench system, even a non-professional person could know about the hardware health condition of the whole machine or subs. In general, the test-bench system enables quick diagnosis of BAAR at the logging site and has a significant meaning in laying foundations for the industrial production of BAAR. Acknowledgments This work is supported by National Natural Science Foundation of China (61102102, 11204380, 11374371, 11134011), National Science and Technology Major Project (2011ZX05020-009), PetroChina Innovation Foundation (2014D-5006-0307), China National Petroleum Corporation (2014B-4011, 2014D-4105, 2014A-3912), Science Foundation of China University of Petroleum, Beijing (2462015YQ0516). References Ju X D , Qiao W X , Zhao H L , Lu J Q , Men B Y , Wu W H . , 2012 System design of a new accoustic logging tool , Well Logging Technol. , vol. 36 (pg. 507 - 510 ) OpenURL Placeholder Text WorldCat Ju X D , Cheng X Y , Lu J Q , Xu W , Men B Y , Wu W H . , 2009 Design of test-bench system for logging tools based on embedded structures , Well Logging Technol. , vol. 33 (pg. 270 - 274 ) OpenURL Placeholder Text WorldCat Lu J Q , Ju X D , Men B Y . , 2012 Design of test platform for receiver mandrel of multi-pole array acoustic logging tool 9th Int. Conf. on Fuzzy Systems and Knowledge Discovery (FSKD) IEEE (pg. 2660 - 2663 ) Men B Y , Ju X D , Qiao W X , Cheng X Y , Lu J Q . , 2011 Design of test-bench system for the multi-frequency array induction imaging logging tool based on embedded structures , Sci. Technol. Eng. , vol. 11 (pg. 2450 - 2454 ) OpenURL Placeholder Text WorldCat Wu W H , Ju X D , Cheng X Y , Lu J Q , Deng L . , 2011 Design of front-end computer software for logging tool test-bench based on uClinux , J. China Univ. Pet. , vol. 35 (pg. 63 - 66 ) OpenURL Placeholder Text WorldCat Xue M , Chu Z H , Bian H L , Yin Q W , Chai X Y . , 2002 Remote exploration acoustic reflection well logging device and its acoustic sonde design , Well Logging Technol. , vol. 26 (pg. 35 - 39 ) OpenURL Placeholder Text WorldCat Zhang K , Ju X D , Lu J Q , Men B Y . , 2014 Design of acoustic logging signal source of imitation based on field programmable gate array , J. Geophys. Eng. , vol. 11 045008 10.1088/1742-2132/11/4/045008 OpenURL Placeholder Text WorldCat Crossref © 2016 Sinopec Geophysical Research Institute
TI - Test-bench system for a borehole azimuthal acoustic reflection imaging logging tool
JF - Journal of Geophysics and Engineering
DO - 10.1088/1742-2132/13/3/295
DA - 2016-06-01
UR - https://www.deepdyve.com/lp/oxford-university-press/test-bench-system-for-a-borehole-azimuthal-acoustic-reflection-imaging-0DsXshWHkm
SP - 295
VL - 13
IS - 3
DP - DeepDyve
ER -