%0 Journal Article
%T Low leakage 3×VDD-tolerant ESD detection circuit without deep N-well in a standard 90-nm low-voltage CMOS process
%A Yang, ZhaoNian
%A Liu, HongXia
%A Wang, ShuLong
%J "Science China Technological Sciences"
%V 56
%N 8
%P 2046-2051
%@ 1674-7321
%D 2013-08-01
%I Springer Berlin Heidelberg
%~ DeepDyve