%0 Journal Article
%T Spacer double patterning technique for sub-40nm DRAM manufacturing process development
%A Shiu, Weicheng
%J Proceedings of SPIE
%V 7140
%N 1
%P 71403Y-71403Y-8
%@ 0277-786X
%D 2008-11-20
%I SPIE
%~ DeepDyve