%0 Journal Article
%T Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current
%A Díaz-Madrid, José Ángel
%A Doménech-Asensi, Ginés
%A Ruiz-Merino, Ramón
%A Zapata, Juan
%A Martínez, José Javier
%J Analog Integrated Circuits and Signal Processing
%V 105
%N 1
%P 45-55
%@ 0925-1030
%D 2020-10-04
%I Springer US
%~ DeepDyve