%0 Journal Article
%T A 77% energy-saving 22-transistor single-phase-clocking D-flip-flop with adaptive-coupling configuration in 40nm CMOS
%A Teh, Chen Kong
%A Fujita, Tetsuya
%A Hara, Hiroyuki
%A Hamada, Mototsugu
%A ,
%J 2011 IEEE International Solid-State Circuits Conference
%D 2011-02-01
%I IEEE
%~ DeepDyve